X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips32.h;h=4f0f0ef073ebfb6c2dd842148331dd9034d9097c;hp=0d544a406958f78960fef8195e7eeee639053390;hb=5d9b7cdd2b2a4759740e35b23aade517b8b3a548;hpb=0cd84000daab056dea61eb9d60cca538a3716acd

diff --git a/src/target/mips32.h b/src/target/mips32.h
index 0d544a4069..4f0f0ef073 100644
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -110,6 +110,8 @@ struct mips32_algorithm
 #define MIPS32_OP_SH	0x29
 #define MIPS32_OP_SW	0x2B
 #define MIPS32_OP_ORI	0x0D
+#define MIPS32_OP_XOR	0x26
+#define MIPS32_OP_SRL	0x03
 
 #define MIPS32_COP0_MF	0x00
 #define MIPS32_COP0_MT	0x04
@@ -135,10 +137,12 @@ struct mips32_algorithm
 #define MIPS32_MFHI(reg)			MIPS32_R_INST(0, 0, 0, reg, 0, MIPS32_OP_MFHI)
 #define MIPS32_MTLO(reg)			MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_MTLO)
 #define MIPS32_MTHI(reg)			MIPS32_R_INST(0, reg, 0, 0, 0, MIPS32_OP_MTHI)
-#define MIPS32_ORI(src, tar, val)	MIPS32_I_INST(MIPS32_OP_ORI, src, tar, val)
+#define MIPS32_ORI(tar, src, val)	MIPS32_I_INST(MIPS32_OP_ORI, src, tar, val)
 #define MIPS32_SB(reg, off, base)	MIPS32_I_INST(MIPS32_OP_SB, base, reg, off)
 #define MIPS32_SH(reg, off, base)	MIPS32_I_INST(MIPS32_OP_SH, base, reg, off)
 #define MIPS32_SW(reg, off, base)	MIPS32_I_INST(MIPS32_OP_SW, base, reg, off)
+#define MIPS32_XOR(reg, val1, val2)	MIPS32_R_INST(0, val1, val2, reg, 0, MIPS32_OP_XOR)
+#define MIPS32_SRL(reg, src, off)	MIPS32_R_INST(0, 0, src, reg, off, MIPS32_OP_SRL)
 
 /* ejtag specific instructions */
 #define MIPS32_DRET					0x4200001F