X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips32_pracc.c;h=790c8dc93e23acaf5319b4ac279b4d04f59a4653;hp=92b8699e0e21fe93bc1b6e89acaac3633561357b;hb=7a3eec2b4d9dbb9533acfb271dbe91afa0727c8e;hpb=5e1f5f4731887288172b01754004bc8dc09d4cee diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c index 92b8699e0e..790c8dc93e 100644 --- a/src/target/mips32_pracc.c +++ b/src/target/mips32_pracc.c @@ -20,9 +20,7 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * along with this program. If not, see . * ***************************************************************************/ /* @@ -56,12 +54,6 @@ * The original code contained NOPs. I have removed these and moved * the branches. * - * I also moved the PRACC_STACK to 0xFF204000. This allows - * the use of 16 bits offsets to get pointers to the input - * and output area relative to the stack. Note that the stack - * isn't really a stack (the stack pointer is not 'moving') - * but a FIFO simulated in software. - * * These changes result in a 35% speed increase when programming an * external flash. * @@ -81,579 +73,521 @@ #include "mips32.h" #include "mips32_pracc.h" -struct mips32_pracc_context { - uint32_t *local_iparam; - int num_iparam; - uint32_t *local_oparam; - int num_oparam; - const uint32_t *code; - int code_len; - uint32_t stack[32]; - int stack_offset; - struct mips_ejtag *ejtag_info; -}; - -static int mips32_pracc_read_mem8(struct mips_ejtag *ejtag_info, - uint32_t addr, int count, uint8_t *buf); -static int mips32_pracc_read_mem16(struct mips_ejtag *ejtag_info, - uint32_t addr, int count, uint16_t *buf); -static int mips32_pracc_read_mem32(struct mips_ejtag *ejtag_info, - uint32_t addr, int count, uint32_t *buf); -static int mips32_pracc_read_u32(struct mips_ejtag *ejtag_info, - uint32_t addr, uint32_t *buf); - -static int mips32_pracc_write_mem8(struct mips_ejtag *ejtag_info, - uint32_t addr, int count, uint8_t *buf); -static int mips32_pracc_write_mem16(struct mips_ejtag *ejtag_info, - uint32_t addr, int count, uint16_t *buf); -static int mips32_pracc_write_mem32(struct mips_ejtag *ejtag_info, - uint32_t addr, int count, uint32_t *buf); -static int mips32_pracc_write_u32(struct mips_ejtag *ejtag_info, - uint32_t addr, uint32_t *buf); - -static int mips32_pracc_sync_cache(struct mips_ejtag *ejtag_info, - uint32_t start_addr, uint32_t end_addr); -static int mips32_pracc_clean_invalidate_cache(struct mips_ejtag *ejtag_info, - uint32_t start_addr, uint32_t end_addr); - -static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info, uint32_t *ctrl) +static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info) { - uint32_t ejtag_ctrl; - long long then = timeval_ms(); - int timeout; - int retval; + int64_t then = timeval_ms(); /* wait for the PrAcc to become "1" */ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); - ejtag_ctrl = ejtag_info->ejtag_ctrl; while (1) { - retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + ejtag_info->pa_ctrl = ejtag_info->ejtag_ctrl; + int retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_info->pa_ctrl); if (retval != ERROR_OK) return retval; - if (ejtag_ctrl & EJTAG_CTRL_PRACC) + if (ejtag_info->pa_ctrl & EJTAG_CTRL_PRACC) break; - timeout = timeval_ms() - then; + int64_t timeout = timeval_ms() - then; if (timeout > 1000) { LOG_DEBUG("DEBUGMODULE: No memory access in progress!"); return ERROR_JTAG_DEVICE_ERROR; } } - *ctrl = ejtag_ctrl; return ERROR_OK; } -static int mips32_pracc_exec_read(struct mips32_pracc_context *ctx, uint32_t address) +/* Shift in control and address for a new processor access, save them in ejtag_info */ +static int mips32_pracc_read_ctrl_addr(struct mips_ejtag *ejtag_info) { - struct mips_ejtag *ejtag_info = ctx->ejtag_info; - int offset; - uint32_t ejtag_ctrl, data; - - if ((address >= MIPS32_PRACC_PARAM_IN) - && (address < MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4)) { - offset = (address - MIPS32_PRACC_PARAM_IN) / 4; - data = ctx->local_iparam[offset]; - } else if ((address >= MIPS32_PRACC_PARAM_OUT) - && (address < MIPS32_PRACC_PARAM_OUT + ctx->num_oparam * 4)) { - offset = (address - MIPS32_PRACC_PARAM_OUT) / 4; - data = ctx->local_oparam[offset]; - } else if ((address >= MIPS32_PRACC_TEXT) - && (address < MIPS32_PRACC_TEXT + ctx->code_len * 4)) { - offset = (address - MIPS32_PRACC_TEXT) / 4; - data = ctx->code[offset]; - } else if (address == MIPS32_PRACC_STACK) { - if (ctx->stack_offset <= 0) { - LOG_ERROR("Error: Pracc stack out of bounds"); - return ERROR_JTAG_DEVICE_ERROR; - } - /* save to our debug stack */ - data = ctx->stack[--ctx->stack_offset]; - } else { - /* TODO: send JMP 0xFF200000 instruction. Hopefully processor jump back - * to start of debug vector */ - - LOG_ERROR("Error reading unexpected address 0x%8.8" PRIx32 "", address); - return ERROR_JTAG_DEVICE_ERROR; - } + int retval = wait_for_pracc_rw(ejtag_info); + if (retval != ERROR_OK) + return retval; - /* Send the data out */ - mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_DATA); - mips_ejtag_drscan_32_out(ctx->ejtag_info, data); + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS); - /* Clear the access pending bit (let the processor eat!) */ - ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC; - mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL); - mips_ejtag_drscan_32_out(ctx->ejtag_info, ejtag_ctrl); + ejtag_info->pa_addr = 0; + return mips_ejtag_drscan_32(ejtag_info, &ejtag_info->pa_addr); +} - return jtag_execute_queue(); +/* Finish processor access */ +static void mips32_pracc_finish(struct mips_ejtag *ejtag_info) +{ + uint32_t ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC; + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); + mips_ejtag_drscan_32_out(ejtag_info, ctrl); } -static int mips32_pracc_exec_write(struct mips32_pracc_context *ctx, uint32_t address) +int mips32_pracc_clean_text_jump(struct mips_ejtag *ejtag_info) { - uint32_t ejtag_ctrl, data; - int offset; - struct mips_ejtag *ejtag_info = ctx->ejtag_info; - int retval; + uint32_t jt_code = MIPS32_J(ejtag_info->isa, MIPS32_PRACC_TEXT); + pracc_swap16_array(ejtag_info, &jt_code, 1); + /* do 3 0/nops to clean pipeline before a jump to pracc text, NOP in delay slot */ + for (int i = 0; i != 5; i++) { + /* Wait for pracc */ + int retval = wait_for_pracc_rw(ejtag_info); + if (retval != ERROR_OK) + return retval; - mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_DATA); - retval = mips_ejtag_drscan_32(ctx->ejtag_info, &data); - if (retval != ERROR_OK) - return retval; + /* Data or instruction out */ + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA); + uint32_t data = (i == 3) ? jt_code : MIPS32_NOP; + mips_ejtag_drscan_32_out(ejtag_info, data); - /* Clear access pending bit */ - ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC; - mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL); - mips_ejtag_drscan_32_out(ctx->ejtag_info, ejtag_ctrl); + /* finish pa */ + mips32_pracc_finish(ejtag_info); + } - retval = jtag_execute_queue(); - if (retval != ERROR_OK) - return retval; + if (ejtag_info->mode != 0) /* async mode support only for MIPS ... */ + return ERROR_OK; - if ((address >= MIPS32_PRACC_PARAM_IN) - && (address < MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4)) { - offset = (address - MIPS32_PRACC_PARAM_IN) / 4; - ctx->local_iparam[offset] = data; - } else if ((address >= MIPS32_PRACC_PARAM_OUT) - && (address < MIPS32_PRACC_PARAM_OUT + ctx->num_oparam * 4)) { - offset = (address - MIPS32_PRACC_PARAM_OUT) / 4; - ctx->local_oparam[offset] = data; - } else if (address == MIPS32_PRACC_STACK) { - if (ctx->stack_offset >= 32) { - LOG_ERROR("Error: Pracc stack out of bounds"); - return ERROR_JTAG_DEVICE_ERROR; - } - /* save data onto our stack */ - ctx->stack[ctx->stack_offset++] = data; - } else { - LOG_ERROR("Error writing unexpected address 0x%8.8" PRIx32 "", address); - return ERROR_JTAG_DEVICE_ERROR; + for (int i = 0; i != 2; i++) { + int retval = mips32_pracc_read_ctrl_addr(ejtag_info); + if (retval != ERROR_OK) + return retval; + + if (ejtag_info->pa_addr != MIPS32_PRACC_TEXT) { /* LEXRA/BMIPS ?, shift out another NOP, max 2 */ + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA); + mips_ejtag_drscan_32_out(ejtag_info, MIPS32_NOP); + mips32_pracc_finish(ejtag_info); + } else + break; } return ERROR_OK; } -int mips32_pracc_exec(struct mips_ejtag *ejtag_info, int code_len, const uint32_t *code, - int num_param_in, uint32_t *param_in, int num_param_out, uint32_t *param_out, int cycle) +int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx, + uint32_t *param_out, bool check_last) { - uint32_t ejtag_ctrl; - uint32_t address; - struct mips32_pracc_context ctx; + int code_count = 0; + int store_pending = 0; /* increases with every store instr at dmseg, decreases with every store pa */ + uint32_t max_store_addr = 0; /* for store pa address testing */ + bool restart = 0; /* restarting control */ + int restart_count = 0; + uint32_t instr = 0; + bool final_check = 0; /* set to 1 if in final checks after function code shifted out */ + bool pass = 0; /* to check the pass through pracc text after function code sent */ int retval; - int pass = 0; - - ctx.local_iparam = param_in; - ctx.local_oparam = param_out; - ctx.num_iparam = num_param_in; - ctx.num_oparam = num_param_out; - ctx.code = code; - ctx.code_len = code_len; - ctx.ejtag_info = ejtag_info; - ctx.stack_offset = 0; while (1) { - retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl); - if (retval != ERROR_OK) - return retval; + if (restart) { + if (restart_count < 3) { /* max 3 restarts allowed */ + retval = mips32_pracc_clean_text_jump(ejtag_info); + if (retval != ERROR_OK) + return retval; + } else + return ERROR_JTAG_DEVICE_ERROR; + restart_count++; + restart = 0; + code_count = 0; + LOG_DEBUG("restarting code"); + } - address = 0; - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS); - retval = mips_ejtag_drscan_32(ejtag_info, &address); + retval = mips32_pracc_read_ctrl_addr(ejtag_info); /* update current pa info: control and address */ if (retval != ERROR_OK) return retval; - /* Check for read or write */ - if (ejtag_ctrl & EJTAG_CTRL_PRNW) { - retval = mips32_pracc_exec_write(&ctx, address); + /* Check for read or write access */ + if (ejtag_info->pa_ctrl & EJTAG_CTRL_PRNW) { /* write/store access */ + /* Check for pending store from a previous store instruction at dmseg */ + if (store_pending == 0) { + LOG_DEBUG("unexpected write at address %" PRIx32, ejtag_info->pa_addr); + if (code_count < 2) { /* allow for restart */ + restart = 1; + continue; + } else + return ERROR_JTAG_DEVICE_ERROR; + } else { + /* check address */ + if (ejtag_info->pa_addr < MIPS32_PRACC_PARAM_OUT || + ejtag_info->pa_addr > max_store_addr) { + LOG_DEBUG("writing at unexpected address %" PRIx32, ejtag_info->pa_addr); + return ERROR_JTAG_DEVICE_ERROR; + } + } + /* read data */ + uint32_t data = 0; + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA); + retval = mips_ejtag_drscan_32(ejtag_info, &data); if (retval != ERROR_OK) return retval; - } else { - /* Check to see if its reading at the debug vector. The first pass through - * the module is always read at the vector, so the first one we allow. When - * the second read from the vector occurs we are done and just exit. */ - if ((address == MIPS32_PRACC_TEXT) && (pass++)) - break; - retval = mips32_pracc_exec_read(&ctx, address); - if (retval != ERROR_OK) - return retval; + /* store data at param out, address based offset */ + param_out[(ejtag_info->pa_addr - MIPS32_PRACC_PARAM_OUT) / 4] = data; + store_pending--; + + } else { /* read/fetch access */ + if (!final_check) { /* executing function code */ + /* check address */ + if (ejtag_info->pa_addr != (MIPS32_PRACC_TEXT + code_count * 4)) { + LOG_DEBUG("reading at unexpected address %" PRIx32 ", expected %x", + ejtag_info->pa_addr, MIPS32_PRACC_TEXT + code_count * 4); + + /* restart code execution only in some cases */ + if (code_count == 1 && ejtag_info->pa_addr == MIPS32_PRACC_TEXT && + restart_count == 0) { + LOG_DEBUG("restarting, without clean jump"); + restart_count++; + code_count = 0; + continue; + } else if (code_count < 2) { + restart = 1; + continue; + } + return ERROR_JTAG_DEVICE_ERROR; + } + /* check for store instruction at dmseg */ + uint32_t store_addr = ctx->pracc_list[code_count].addr; + if (store_addr != 0) { + if (store_addr > max_store_addr) + max_store_addr = store_addr; + store_pending++; + } + + instr = ctx->pracc_list[code_count++].instr; + if (code_count == ctx->code_count) /* last instruction, start final check */ + final_check = 1; + + } else { /* final check after function code shifted out */ + /* check address */ + if (ejtag_info->pa_addr == MIPS32_PRACC_TEXT) { + if (!pass) { /* first pass through pracc text */ + if (store_pending == 0) /* done, normal exit */ + return ERROR_OK; + pass = 1; /* pracc text passed */ + code_count = 0; /* restart code count */ + } else { + LOG_DEBUG("unexpected second pass through pracc text"); + return ERROR_JTAG_DEVICE_ERROR; + } + } else { + if (ejtag_info->pa_addr != (MIPS32_PRACC_TEXT + code_count * 4)) { + LOG_DEBUG("unexpected read address in final check: %" + PRIx32 ", expected: %x", ejtag_info->pa_addr, + MIPS32_PRACC_TEXT + code_count * 4); + return ERROR_JTAG_DEVICE_ERROR; + } + } + if (!pass) { + if ((code_count - ctx->code_count) > 1) { /* allow max 2 instr delay slot */ + LOG_DEBUG("failed to jump back to pracc text"); + return ERROR_JTAG_DEVICE_ERROR; + } + } else + if (code_count > 10) { /* enough, abandone */ + LOG_DEBUG("execution abandoned, store pending: %d", store_pending); + return ERROR_JTAG_DEVICE_ERROR; + } + instr = MIPS32_NOP; /* shift out NOPs instructions */ + code_count++; + } + + /* Send instruction out */ + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA); + mips_ejtag_drscan_32_out(ejtag_info, instr); } + /* finish processor access, let the processor eat! */ + mips32_pracc_finish(ejtag_info); - if (cycle == 0) - break; - } + if (final_check && !check_last) /* last instr, don't check, execute and exit */ + return jtag_execute_queue(); - /* stack sanity check */ - if (ctx.stack_offset != 0) - LOG_DEBUG("Pracc Stack not zero"); + if (store_pending == 0 && pass) { /* store access done, but after passing pracc text */ + LOG_DEBUG("warning: store access pass pracc text"); + return ERROR_OK; + } + } +} - return ERROR_OK; +inline void pracc_queue_init(struct pracc_queue_info *ctx) +{ + ctx->retval = ERROR_OK; + ctx->code_count = 0; + ctx->store_count = 0; + ctx->max_code = 0; + ctx->pracc_list = NULL; + ctx->isa = ctx->ejtag_info->isa ? 1 : 0; } -int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf) +void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr) { - switch (size) { - case 1: - return mips32_pracc_read_mem8(ejtag_info, addr, count, (uint8_t *)buf); - case 2: - return mips32_pracc_read_mem16(ejtag_info, addr, count, (uint16_t *)buf); - case 4: - if (count == 1) - return mips32_pracc_read_u32(ejtag_info, addr, (uint32_t *)buf); - else - return mips32_pracc_read_mem32(ejtag_info, addr, count, (uint32_t *)buf); + if (ctx->retval != ERROR_OK) /* On previous out of memory, return */ + return; + if (ctx->code_count == ctx->max_code) { + void *p = realloc(ctx->pracc_list, sizeof(pa_list) * (ctx->max_code + PRACC_BLOCK)); + if (p) { + ctx->max_code += PRACC_BLOCK; + ctx->pracc_list = p; + } else { + ctx->retval = ERROR_FAIL; /* Out of memory */ + return; + } } - - return ERROR_OK; + ctx->pracc_list[ctx->code_count].instr = instr; + ctx->pracc_list[ctx->code_count++].addr = addr; + if (addr) + ctx->store_count++; } -static int mips32_pracc_read_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf) +void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize) { - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - MIPS32_SW(10, 0, 15), /* sw $10,($15) */ - MIPS32_SW(11, 0, 15), /* sw $11,($15) */ - - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(9, 0, 8), /* $9 = mem[$8]; read addr */ - MIPS32_LW(10, 4, 8), /* $10 = mem[$8 + 4]; read count */ - MIPS32_LUI(11, UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $11 = MIPS32_PRACC_PARAM_OUT */ - MIPS32_ORI(11, 11, LOWER16(MIPS32_PRACC_PARAM_OUT)), - /* loop: */ - MIPS32_BEQ(0, 10, 8), /* beq 0, $10, end */ - MIPS32_NOP, - - MIPS32_LW(8, 0, 9), /* lw $8,0($9), Load $8 with the word @mem[$9] */ - MIPS32_SW(8, 0, 11), /* sw $8,0($11) */ - - MIPS32_ADDI(10, 10, NEG16(1)), /* $10-- */ - MIPS32_ADDI(9, 9, 4), /* $1 += 4 */ - MIPS32_ADDI(11, 11, 4), /* $11 += 4 */ - - MIPS32_B(NEG16(8)), /* b loop */ - MIPS32_NOP, - /* end: */ - MIPS32_LW(11, 0, 15), /* lw $11,($15) */ - MIPS32_LW(10, 0, 15), /* lw $10,($15) */ - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(27)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; - - int retval = ERROR_OK; - int blocksize; - int wordsread; - uint32_t param_in[2]; - - wordsread = 0; - - while (count > 0) { - blocksize = count; - if (count > 0x400) - blocksize = 0x400; - - param_in[0] = addr; - param_in[1] = blocksize; - - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - ARRAY_SIZE(param_in), param_in, blocksize, &buf[wordsread], 1); - if (retval != ERROR_OK) - return retval; - - count -= blocksize; - addr += blocksize*sizeof(uint32_t); - wordsread += blocksize; + if (LOWER16(data) == 0 && optimize) + pracc_add(ctx, 0, MIPS32_LUI(ctx->isa, reg_num, UPPER16(data))); /* load only upper value */ + else if (UPPER16(data) == 0 && optimize) + pracc_add(ctx, 0, MIPS32_ORI(ctx->isa, reg_num, 0, LOWER16(data))); /* load only lower */ + else { + pracc_add(ctx, 0, MIPS32_LUI(ctx->isa, reg_num, UPPER16(data))); /* load upper and lower */ + pracc_add(ctx, 0, MIPS32_ORI(ctx->isa, reg_num, reg_num, LOWER16(data))); } - - return retval; } -static int mips32_pracc_read_u32(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *buf) +inline void pracc_queue_free(struct pracc_queue_info *ctx) { - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - - MIPS32_LW(8, NEG16(MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_IN), 15), /* load R8 @ param_in[0] = address */ - - MIPS32_LW(8, 0, 8), /* lw $8,0($8), Load $8 with the word @mem[$8] */ - MIPS32_SW(8, NEG16(MIPS32_PRACC_STACK - MIPS32_PRACC_PARAM_OUT), 15), /* store R8 @ param_out[0] */ - - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(9)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; - - int retval = ERROR_OK; - uint32_t param_in[1]; - - param_in[0] = addr; - - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - ARRAY_SIZE(param_in), param_in, 1, buf, 1); - if (retval != ERROR_OK) - return retval; - - return retval; + if (ctx->pracc_list != NULL) + free(ctx->pracc_list); } -static int mips32_pracc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf) +int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx, + uint32_t *buf, bool check_last) { - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - MIPS32_SW(10, 0, 15), /* sw $10,($15) */ - MIPS32_SW(11, 0, 15), /* sw $11,($15) */ - - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(9, 0, 8), /* $9 = mem[$8]; read addr */ - MIPS32_LW(10, 4, 8), /* $10 = mem[$8 + 4]; read count */ - MIPS32_LUI(11, UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $11 = MIPS32_PRACC_PARAM_OUT */ - MIPS32_ORI(11, 11, LOWER16(MIPS32_PRACC_PARAM_OUT)), - /* loop: */ - MIPS32_BEQ(0, 10, 8), /* beq 0, $10, end */ - MIPS32_NOP, - - MIPS32_LHU(8, 0, 9), /* lw $8,0($9), Load $8 with the halfword @mem[$9] */ - MIPS32_SW(8, 0, 11), /* sw $8,0($11) */ - - MIPS32_ADDI(10, 10, NEG16(1)), /* $10-- */ - MIPS32_ADDI(9, 9, 2), /* $9 += 2 */ - MIPS32_ADDI(11, 11, 4), /* $11 += 4 */ - MIPS32_B(NEG16(8)), /* b loop */ - MIPS32_NOP, - /* end: */ - MIPS32_LW(11, 0, 15), /* lw $11,($15) */ - MIPS32_LW(10, 0, 15), /* lw $10,($15) */ - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(27)), /* b start */ - MIPS32_MFC0(15, 30, 0), /* move COP0 DeSave to $15 */ - }; - - /* TODO remove array */ - uint32_t *param_out = malloc(count * sizeof(uint32_t)); - if (param_out == NULL) { + if (ctx->retval != ERROR_OK) { LOG_ERROR("Out of memory"); return ERROR_FAIL; } - int retval = ERROR_OK; - int blocksize; - int hwordsread = 0; - uint32_t param_in[2]; + if (ejtag_info->isa && ejtag_info->endianness) + for (int i = 0; i != ctx->code_count; i++) + ctx->pracc_list[i].instr = SWAP16(ctx->pracc_list[i].instr); - while (count > 0) { - blocksize = count; - if (count > 0x400) - blocksize = 0x400; + if (ejtag_info->mode == 0) + return mips32_pracc_exec(ejtag_info, ctx, buf, check_last); + + union scan_in { + uint8_t scan_96[12]; + struct { + uint8_t ctrl[4]; + uint8_t data[4]; + uint8_t addr[4]; + } scan_32; + + } *scan_in = malloc(sizeof(union scan_in) * (ctx->code_count + ctx->store_count)); + if (scan_in == NULL) { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } - param_in[0] = addr; - param_in[1] = blocksize; + unsigned num_clocks = + ((uint64_t)(ejtag_info->scan_delay) * jtag_get_speed_khz() + 500000) / 1000000; - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - ARRAY_SIZE(param_in), param_in, blocksize, ¶m_out[hwordsread], 1); + uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC; + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ALL); - if (retval != ERROR_OK) - return retval; + int scan_count = 0; + for (int i = 0; i != ctx->code_count; i++) { + jtag_add_clocks(num_clocks); + mips_ejtag_add_scan_96(ejtag_info, ejtag_ctrl, ctx->pracc_list[i].instr, + scan_in[scan_count++].scan_96); - count -= blocksize; - addr += blocksize*sizeof(uint16_t); - hwordsread += blocksize; + /* Check store address from previous instruction, if not the first */ + if (i > 0 && ctx->pracc_list[i - 1].addr) { + jtag_add_clocks(num_clocks); + mips_ejtag_add_scan_96(ejtag_info, ejtag_ctrl, 0, scan_in[scan_count++].scan_96); + } } - int i; - for (i = 0; i < hwordsread; i++) - buf[i] = param_out[i]; - - free(param_out); + int retval = jtag_execute_queue(); /* execute queued scans */ + if (retval != ERROR_OK) + goto exit; + + uint32_t fetch_addr = MIPS32_PRACC_TEXT; /* start address */ + scan_count = 0; + for (int i = 0; i != ctx->code_count; i++) { /* verify every pracc access */ + /* check pracc bit */ + ejtag_ctrl = buf_get_u32(scan_in[scan_count].scan_32.ctrl, 0, 32); + uint32_t addr = buf_get_u32(scan_in[scan_count].scan_32.addr, 0, 32); + if (!(ejtag_ctrl & EJTAG_CTRL_PRACC)) { + LOG_ERROR("Error: access not pending count: %d", scan_count); + retval = ERROR_FAIL; + goto exit; + } + if (ejtag_ctrl & EJTAG_CTRL_PRNW) { + LOG_ERROR("Not a fetch/read access, count: %d", scan_count); + retval = ERROR_FAIL; + goto exit; + } + if (addr != fetch_addr) { + LOG_ERROR("Fetch addr mismatch, read: %" PRIx32 " expected: %" PRIx32 " count: %d", + addr, fetch_addr, scan_count); + retval = ERROR_FAIL; + goto exit; + } + fetch_addr += 4; + scan_count++; + + /* check if previous intrucction is a store instruction at dmesg */ + if (i > 0 && ctx->pracc_list[i - 1].addr) { + uint32_t store_addr = ctx->pracc_list[i - 1].addr; + ejtag_ctrl = buf_get_u32(scan_in[scan_count].scan_32.ctrl, 0, 32); + addr = buf_get_u32(scan_in[scan_count].scan_32.addr, 0, 32); + + if (!(ejtag_ctrl & EJTAG_CTRL_PRNW)) { + LOG_ERROR("Not a store/write access, count: %d", scan_count); + retval = ERROR_FAIL; + goto exit; + } + if (addr != store_addr) { + LOG_ERROR("Store address mismatch, read: %" PRIx32 " expected: %" PRIx32 " count: %d", + addr, store_addr, scan_count); + retval = ERROR_FAIL; + goto exit; + } + int buf_index = (addr - MIPS32_PRACC_PARAM_OUT) / 4; + buf[buf_index] = buf_get_u32(scan_in[scan_count].scan_32.data, 0, 32); + scan_count++; + } + } +exit: + free(scan_in); return retval; } -static int mips32_pracc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf) +int mips32_pracc_read_u32(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *buf) { - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - MIPS32_SW(10, 0, 15), /* sw $10,($15) */ - MIPS32_SW(11, 0, 15), /* sw $11,($15) */ - - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(9, 0, 8), /* $9 = mem[$8]; read addr */ - MIPS32_LW(10, 4, 8), /* $10 = mem[$8 + 4]; read count */ - MIPS32_LUI(11, UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $11 = MIPS32_PRACC_PARAM_OUT */ - MIPS32_ORI(11, 11, LOWER16(MIPS32_PRACC_PARAM_OUT)), - /* loop: */ - MIPS32_BEQ(0, 10, 8), /* beq 0, $10, end */ - MIPS32_NOP, - - MIPS32_LBU(8, 0, 9), /* lw $8,0($9), Load t4 with the byte @mem[t1] */ - MIPS32_SW(8, 0, 11), /* sw $8,0($11) */ - - MIPS32_ADDI(10, 10, NEG16(1)), /* $10-- */ - MIPS32_ADDI(9, 9, 1), /* $9 += 1 */ - MIPS32_ADDI(11, 11, 4), /* $11 += 4 */ - MIPS32_B(NEG16(8)), /* b loop */ - MIPS32_NOP, - /* end: */ - MIPS32_LW(11, 0, 15), /* lw $11,($15) */ - MIPS32_LW(10, 0, 15), /* lw $10,($15) */ - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(27)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; + struct pracc_queue_info ctx = {.ejtag_info = ejtag_info}; + pracc_queue_init(&ctx); + + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 15, PRACC_UPPER_BASE_ADDR)); /* $15 = MIPS32_PRACC_BASE_ADDR */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 8, UPPER16((addr + 0x8000)))); /* load $8 with modified upper addr */ + pracc_add(&ctx, 0, MIPS32_LW(ctx.isa, 8, LOWER16(addr), 8)); /* lw $8, LOWER16(addr)($8) */ + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT, + MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET, 15)); /* sw $8,PRACC_OUT_OFFSET($15) */ + pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */ + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* move COP0 DeSave to $15 */ + + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, buf, 1); + pracc_queue_free(&ctx); + return ctx.retval; +} - /* TODO remove array */ - uint32_t *param_out = malloc(count * sizeof(uint32_t)); - if (param_out == NULL) { - LOG_ERROR("Out of memory"); - return ERROR_FAIL; +int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf) +{ + if (count == 1 && size == 4) + return mips32_pracc_read_u32(ejtag_info, addr, (uint32_t *)buf); + + struct pracc_queue_info ctx = {.ejtag_info = ejtag_info}; + pracc_queue_init(&ctx); + + uint32_t *data = NULL; + if (size != 4) { + data = malloc(256 * sizeof(uint32_t)); + if (data == NULL) { + LOG_ERROR("Out of memory"); + goto exit; + } } - int retval = ERROR_OK; - int blocksize; - uint32_t param_in[2]; - int bytesread = 0; + uint32_t *buf32 = buf; + uint16_t *buf16 = buf; + uint8_t *buf8 = buf; - while (count > 0) { - blocksize = count; - if (count > 0x400) - blocksize = 0x400; + while (count) { + ctx.code_count = 0; + ctx.store_count = 0; - param_in[0] = addr; - param_in[1] = blocksize; + int this_round_count = (count > 256) ? 256 : count; + uint32_t last_upper_base_addr = UPPER16((addr + 0x8000)); - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - ARRAY_SIZE(param_in), param_in, count, ¶m_out[bytesread], 1); + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 15, PRACC_UPPER_BASE_ADDR)); /* $15 = MIPS32_PRACC_BASE_ADDR */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 9, last_upper_base_addr)); /* upper memory addr to $9 */ - if (retval != ERROR_OK) - return retval; + for (int i = 0; i != this_round_count; i++) { /* Main code loop */ + uint32_t upper_base_addr = UPPER16((addr + 0x8000)); + if (last_upper_base_addr != upper_base_addr) { /* if needed, change upper addr in $9 */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 9, upper_base_addr)); + last_upper_base_addr = upper_base_addr; + } - count -= blocksize; - addr += blocksize; - bytesread += blocksize; - } - int i; - for (i = 0; i < bytesread; i++) - buf[i] = param_out[i]; + if (size == 4) /* load from memory to $8 */ + pracc_add(&ctx, 0, MIPS32_LW(ctx.isa, 8, LOWER16(addr), 9)); + else if (size == 2) + pracc_add(&ctx, 0, MIPS32_LHU(ctx.isa, 8, LOWER16(addr), 9)); + else + pracc_add(&ctx, 0, MIPS32_LBU(ctx.isa, 8, LOWER16(addr), 9)); - free(param_out); - return retval; + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + i * 4, /* store $8 at param out */ + MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + i * 4, 15)); + addr += size; + } + pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */ + pracc_add_li32(&ctx, 9, ejtag_info->reg9, 0); /* restore $9 */ + + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */ + + if (size == 4) { + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, buf32, 1); + if (ctx.retval != ERROR_OK) + goto exit; + buf32 += this_round_count; + } else { + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, data, 1); + if (ctx.retval != ERROR_OK) + goto exit; + + uint32_t *data_p = data; + for (int i = 0; i != this_round_count; i++) { + if (size == 2) + *buf16++ = *data_p++; + else + *buf8++ = *data_p++; + } + } + count -= this_round_count; + } +exit: + pracc_queue_free(&ctx); + if (data != NULL) + free(data); + return ctx.retval; } int mips32_cp0_read(struct mips_ejtag *ejtag_info, uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel) { - /** - * Do not make this code static, but regenerate it every time, - * as 5th element has to be changed to add parameters - */ - uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - - /* 5 */ MIPS32_MFC0(8, 0, 0), /* move COP0 [cp0_reg select] to $8 */ - - MIPS32_LUI(9, UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $11 = MIPS32_PRACC_PARAM_OUT */ - MIPS32_ORI(9, 9, LOWER16(MIPS32_PRACC_PARAM_OUT)), - MIPS32_SW(8, 0, 9), /* sw $8,0($9) */ - - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(12)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; - - /** - * Note that our input parametes cp0_reg and cp0_sel - * are numbers (not gprs) which make part of mfc0 instruction opcode. - * - * These are not fix, but can be different for each mips32_cp0_read() function call, - * and that is why we must insert them directly into opcode, - * i.e. we can not pass it on EJTAG microprogram stack (via param_in), - * and put them into the gprs later from MIPS32_PRACC_STACK - * because mfc0 do not use gpr as a parameter for the cp0_reg and select part, - * but plain (immediate) number. - * - * MIPS32_MTC0 is implemented via MIPS32_R_INST macro. - * In order to insert our parameters, we must change rd and funct fields. - */ - code[5] |= (cp0_reg << 11) | cp0_sel; /* change rd and funct of MIPS32_R_INST macro */ - - /* TODO remove array */ - uint32_t *param_out = val; - int retval; - - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, 0, NULL, 1, param_out, 1); - - return retval; + struct pracc_queue_info ctx = {.ejtag_info = ejtag_info}; + pracc_queue_init(&ctx); + + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 15, PRACC_UPPER_BASE_ADDR)); /* $15 = MIPS32_PRACC_BASE_ADDR */ + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 8, cp0_reg, cp0_sel)); /* move cp0 reg / sel to $8 */ + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT, + MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET, 15)); /* store $8 to pracc_out */ + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 8, UPPER16(ejtag_info->reg8))); /* restore upper 16 bits of $8 */ + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */ + + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, val, 1); + pracc_queue_free(&ctx); + return ctx.retval; } -int mips32_cp0_write(struct mips_ejtag *ejtag_info, - uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel) +int mips32_cp0_write(struct mips_ejtag *ejtag_info, uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel) { - uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(9, 0, 8), /* Load write val to $9 */ - - /* 8 */ MIPS32_MTC0(9, 0, 0), /* move $9 to COP0 [cp0_reg select] */ - - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(12)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; - - /** - * Note that MIPS32_MTC0 macro is implemented via MIPS32_R_INST macro. - * In order to insert our parameters, we must change rd and funct fields. - */ - code[8] |= (cp0_reg << 11) | cp0_sel; /* change rd and funct fields of MIPS32_R_INST macro */ - - /* TODO remove array */ - uint32_t *param_in = malloc(1 * sizeof(uint32_t)); - int retval; - param_in[0] = val; + struct pracc_queue_info ctx = {.ejtag_info = ejtag_info}; + pracc_queue_init(&ctx); - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, 1, param_in, 0, NULL, 1); + pracc_add_li32(&ctx, 15, val, 0); /* Load val to $15 */ - free(param_in); + pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 15, cp0_reg, cp0_sel)); /* write $15 to cp0 reg / sel */ + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */ - return retval; + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 1); + pracc_queue_free(&ctx); + return ctx.retval; } /** @@ -674,164 +608,187 @@ int mips32_cp0_write(struct mips_ejtag *ejtag_info, * to write back any containing D-cache line and invalidate any locations * already in the I-cache. * - * You can do that with cache instructions, but those instructions are only available in kernel mode, - * and a loader writing instructions for the use of its own process need not be privileged software. + * If the cache coherency attribute (CCA) is set to zero, it's a write through cache, there is no need + * to write back. * * In the latest MIPS32/64 CPUs, MIPS provides the synci instruction, * which does the whole job for a cache-line-sized chunk of the memory you just loaded: - * That is, it arranges a D-cache write-back and an I-cache invalidate. + * That is, it arranges a D-cache write-back (if CCA = 3) and an I-cache invalidate. * - * To employ synci at user level, you need to know the size of a cache line, - * and that can be obtained with a rdhwr SYNCI_Step - * from one of the standard “hardware registers”. + * The line size is obtained with the rdhwr SYNCI_Step in release 2 or from cp0 config 1 register in release 1. */ -static int mips32_pracc_sync_cache(struct mips_ejtag *ejtag_info, - uint32_t start_addr, uint32_t end_addr) +static int mips32_pracc_synchronize_cache(struct mips_ejtag *ejtag_info, + uint32_t start_addr, uint32_t end_addr, int cached, int rel) { - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - MIPS32_SW(10, 0, 15), /* sw $10,($15) */ - MIPS32_SW(11, 0, 15), /* sw $11,($15) */ - - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(9, 0, 8), /* Load write start_addr to $9 */ - MIPS32_LW(10, 4, 8), /* Load write end_addr to $10 */ - - MIPS32_RDHWR(11, MIPS32_SYNCI_STEP), /* $11 = MIPS32_SYNCI_STEP */ - MIPS32_BEQ(11, 0, 6), /* beq $11, $0, end */ - MIPS32_NOP, - /* synci_loop : */ - MIPS32_SYNCI(0, 9), /* synci 0($9) */ - MIPS32_SLTU(8, 10, 9), /* sltu $8, $10, $9 # $8 = $10 < $9 ? 1 : 0 */ - MIPS32_BNE(8, 0, NEG16(3)), /* bne $8, $0, synci_loop */ - MIPS32_ADDU(9, 9, 11), /* $9 += MIPS32_SYNCI_STEP */ - MIPS32_SYNC, - /* end: */ - MIPS32_LW(11, 0, 15), /* lw $11,($15) */ - MIPS32_LW(10, 0, 15), /* lw $10,($15) */ - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(24)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; + struct pracc_queue_info ctx = {.ejtag_info = ejtag_info}; + pracc_queue_init(&ctx); - /* TODO remove array */ - uint32_t *param_in = malloc(2 * sizeof(uint32_t)); - int retval; - param_in[0] = start_addr; - param_in[1] = end_addr; + /** Find cache line size in bytes */ + uint32_t clsiz; + if (rel) { /* Release 2 (rel = 1) */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 15, PRACC_UPPER_BASE_ADDR)); /* $15 = MIPS32_PRACC_BASE_ADDR */ - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, 2, param_in, 0, NULL, 1); + pracc_add(&ctx, 0, MIPS32_RDHWR(ctx.isa, 8, MIPS32_SYNCI_STEP)); /* load synci_step value to $8 */ - free(param_in); + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT, + MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET, 15)); /* store $8 to pracc_out */ - return retval; -} + pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */ -/** - * \b mips32_pracc_clean_invalidate_cache - * - * Writeback D$ and Invalidate I$ - * so that the instructions written can be visible to CPU - */ -static int mips32_pracc_clean_invalidate_cache(struct mips_ejtag *ejtag_info, - uint32_t start_addr, uint32_t end_addr) -{ - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - MIPS32_SW(10, 0, 15), /* sw $10,($15) */ - MIPS32_SW(11, 0, 15), /* sw $11,($15) */ - - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(9, 0, 8), /* Load write start_addr to $9 */ - MIPS32_LW(10, 4, 8), /* Load write end_addr to $10 */ - MIPS32_LW(11, 8, 8), /* Load write clsiz to $11 */ - - /* cache_loop: */ - MIPS32_SLTU(8, 10, 9), /* sltu $8, $10, $9 : $8 <- $10 < $9 ? */ - MIPS32_BGTZ(8, 6), /* bgtz $8, end */ - MIPS32_NOP, - - MIPS32_CACHE(MIPS32_CACHE_D_HIT_WRITEBACK, 0, 9), /* cache Hit_Writeback_D, 0($9) */ - MIPS32_CACHE(MIPS32_CACHE_I_HIT_INVALIDATE, 0, 9), /* cache Hit_Invalidate_I, 0($9) */ - - MIPS32_ADDU(9, 9, 11), /* $9 += $11 */ - - MIPS32_B(NEG16(7)), /* b cache_loop */ - MIPS32_NOP, - /* end: */ - MIPS32_LW(11, 0, 15), /* lw $11,($15) */ - MIPS32_LW(10, 0, 15), /* lw $10,($15) */ - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(25)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */ - /** - * Find cache line size in bytes - */ - uint32_t conf; - uint32_t dl, clsiz; + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, &clsiz, 1); + if (ctx.retval != ERROR_OK) + goto exit; - mips32_cp0_read(ejtag_info, &conf, 16, 1); - dl = (conf & MIPS32_CONFIG1_DL_MASK) >> MIPS32_CONFIG1_DL_SHIFT; + } else { /* Release 1 (rel = 0) */ + uint32_t conf; + ctx.retval = mips32_cp0_read(ejtag_info, &conf, 16, 1); + if (ctx.retval != ERROR_OK) + goto exit; - /* dl encoding : dl=1 => 4 bytes, dl=2 => 8 bytes, etc... */ - clsiz = 0x2 << dl; + uint32_t dl = (conf & MIPS32_CONFIG1_DL_MASK) >> MIPS32_CONFIG1_DL_SHIFT; - /* TODO remove array */ - uint32_t *param_in = malloc(3 * sizeof(uint32_t)); - int retval; - param_in[0] = start_addr; - param_in[1] = end_addr; - param_in[2] = clsiz; + /* dl encoding : dl=1 => 4 bytes, dl=2 => 8 bytes, etc... max dl=6 => 128 bytes cache line size */ + clsiz = 0x2 << dl; + if (dl == 0) + clsiz = 0; + } - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, 3, param_in, 0, NULL, 1); + if (clsiz == 0) + goto exit; /* Nothing to do */ - free(param_in); + /* make sure clsiz is power of 2 */ + if (clsiz & (clsiz - 1)) { + LOG_DEBUG("clsiz must be power of 2"); + ctx.retval = ERROR_FAIL; + goto exit; + } - return retval; -} + /* make sure start_addr and end_addr have the same offset inside de cache line */ + start_addr |= clsiz - 1; + end_addr |= clsiz - 1; + + ctx.code_count = 0; + ctx.store_count = 0; + + int count = 0; + uint32_t last_upper_base_addr = UPPER16((start_addr + 0x8000)); + + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 15, last_upper_base_addr)); /* load upper memory base addr to $15 */ + while (start_addr <= end_addr) { /* main loop */ + uint32_t upper_base_addr = UPPER16((start_addr + 0x8000)); + if (last_upper_base_addr != upper_base_addr) { /* if needed, change upper addr in $15 */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 15, upper_base_addr)); + last_upper_base_addr = upper_base_addr; + } + if (rel) /* synci instruction, offset($15) */ + pracc_add(&ctx, 0, MIPS32_SYNCI(ctx.isa, LOWER16(start_addr), 15)); + + else { + if (cached == 3) /* cache Hit_Writeback_D, offset($15) */ + pracc_add(&ctx, 0, MIPS32_CACHE(ctx.isa, MIPS32_CACHE_D_HIT_WRITEBACK, + LOWER16(start_addr), 15)); + /* cache Hit_Invalidate_I, offset($15) */ + pracc_add(&ctx, 0, MIPS32_CACHE(ctx.isa, MIPS32_CACHE_I_HIT_INVALIDATE, + LOWER16(start_addr), 15)); + } + start_addr += clsiz; + count++; + if (count == 256 && start_addr <= end_addr) { /* more ?, then execute code list */ + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* to start */ + pracc_add(&ctx, 0, MIPS32_NOP); /* nop in delay slot */ + + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 1); + if (ctx.retval != ERROR_OK) + goto exit; + + ctx.code_count = 0; /* reset counters for another loop */ + ctx.store_count = 0; + count = 0; + } + } + pracc_add(&ctx, 0, MIPS32_SYNC(ctx.isa)); + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave*/ + + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 1); +exit: + pracc_queue_free(&ctx); + return ctx.retval; +} -int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf) +static int mips32_pracc_write_mem_generic(struct mips_ejtag *ejtag_info, + uint32_t addr, int size, int count, const void *buf) { - int retval; + struct pracc_queue_info ctx = {.ejtag_info = ejtag_info}; + pracc_queue_init(&ctx); + + const uint32_t *buf32 = buf; + const uint16_t *buf16 = buf; + const uint8_t *buf8 = buf; + + while (count) { + ctx.code_count = 0; + ctx.store_count = 0; + + int this_round_count = (count > 128) ? 128 : count; + uint32_t last_upper_base_addr = UPPER16((addr + 0x8000)); + /* load $15 with memory base address */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 15, last_upper_base_addr)); + + for (int i = 0; i != this_round_count; i++) { + uint32_t upper_base_addr = UPPER16((addr + 0x8000)); + if (last_upper_base_addr != upper_base_addr) { /* if needed, change upper address in $15*/ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 15, upper_base_addr)); + last_upper_base_addr = upper_base_addr; + } + + if (size == 4) { + pracc_add_li32(&ctx, 8, *buf32, 1); /* load with li32, optimize */ + pracc_add(&ctx, 0, MIPS32_SW(ctx.isa, 8, LOWER16(addr), 15)); /* store word to mem */ + buf32++; + + } else if (size == 2) { + pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 0, *buf16)); /* load lower value */ + pracc_add(&ctx, 0, MIPS32_SH(ctx.isa, 8, LOWER16(addr), 15)); /* store half word */ + buf16++; + + } else { + pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 0, *buf8)); /* load lower value */ + pracc_add(&ctx, 0, MIPS32_SB(ctx.isa, 8, LOWER16(addr), 15)); /* store byte */ + buf8++; + } + addr += size; + } - switch (size) { - case 1: - retval = mips32_pracc_write_mem8(ejtag_info, addr, count, (uint8_t *)buf); - break; - case 2: - retval = mips32_pracc_write_mem16(ejtag_info, addr, count, (uint16_t *)buf); - break; - case 4: - if (count == 1) - retval = mips32_pracc_write_u32(ejtag_info, addr, (uint32_t *)buf); - else - retval = mips32_pracc_write_mem32(ejtag_info, addr, count, (uint32_t *)buf); - break; - default: - retval = ERROR_FAIL; + pracc_add_li32(&ctx, 8, ejtag_info->reg8, 0); /* restore $8 */ + + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 15, 31, 0)); /* restore $15 from DeSave */ + + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 1); + if (ctx.retval != ERROR_OK) + goto exit; + count -= this_round_count; } +exit: + pracc_queue_free(&ctx); + return ctx.retval; +} + +int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, const void *buf) +{ + int retval = mips32_pracc_write_mem_generic(ejtag_info, addr, size, count, buf); + if (retval != ERROR_OK) + return retval; /** - * If we are in the cachable regoion and cache is activated, - * we must clean D$ + invalidate I$ after we did the write, - * so that changes do not continue to live only in D$, but to be + * If we are in the cacheable region and cache is activated, + * we must clean D$ (if Cache Coherency Attribute is set to 3) + invalidate I$ after we did the write, + * so that changes do not continue to live only in D$ (if CCA = 3), but to be * replicated in I$ also (maybe we wrote the istructions) */ uint32_t conf = 0; @@ -859,374 +816,99 @@ int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int siz } /** - * Check cachablitiy bits coherency algorithm - + * Check cachablitiy bits coherency algorithm * is the region cacheable or uncached. * If cacheable we have to synchronize the cache */ - if (cached == 0x3) { - uint32_t start_addr, end_addr; - uint32_t rel; - - start_addr = addr; - end_addr = addr + count * size; - - /** select cache synchronisation mechanism based on Architecture Release */ - rel = (conf & MIPS32_CONFIG0_AR_MASK) >> MIPS32_CONFIG0_AR_SHIFT; - switch (rel) { - case MIPS32_ARCH_REL1: - /* MIPS32/64 Release 1 - we must use cache instruction */ - mips32_pracc_clean_invalidate_cache(ejtag_info, start_addr, end_addr); - break; - case MIPS32_ARCH_REL2: - /* MIPS32/64 Release 2 - we can use synci instruction */ - mips32_pracc_sync_cache(ejtag_info, start_addr, end_addr); - break; - default: - /* what ? */ - break; + if (cached == 3 || cached == 0) { /* Write back cache or write through cache */ + uint32_t start_addr = addr; + uint32_t end_addr = addr + count * size; + uint32_t rel = (conf & MIPS32_CONFIG0_AR_MASK) >> MIPS32_CONFIG0_AR_SHIFT; + if (rel > 1) { + LOG_DEBUG("Unknown release in cache code"); + return ERROR_FAIL; } + retval = mips32_pracc_synchronize_cache(ejtag_info, start_addr, end_addr, cached, rel); } return retval; } -static int mips32_pracc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf) -{ - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - MIPS32_SW(10, 0, 15), /* sw $10,($15) */ - MIPS32_SW(11, 0, 15), /* sw $11,($15) */ - - MIPS32_ADDI(8, 15, NEG16(MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_IN)), /* $8= MIPS32_PRACC_PARAM_IN */ - MIPS32_LW(9, 0, 8), /* Load write addr to $9 */ - MIPS32_LW(10, 4, 8), /* Load write count to $10 */ - MIPS32_ADDI(8, 8, 8), /* $8 += 8 beginning of data */ - - /* loop: */ - MIPS32_LW(11, 0, 8), /* lw $11,0($8), Load $11 with the word @mem[$8] */ - MIPS32_SW(11, 0, 9), /* sw $11,0($9) */ - - MIPS32_ADDI(9, 9, 4), /* $9 += 4 */ - MIPS32_BNE(10, 9, NEG16(4)), /* bne $10, $9, loop */ - MIPS32_ADDI(8, 8, 4), /* $8 += 4 */ - - /* end: */ - MIPS32_LW(11, 0, 15), /* lw $11,($15) */ - MIPS32_LW(10, 0, 15), /* lw $10,($15) */ - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(21)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; - - /* TODO remove array */ - uint32_t *param_in = malloc((count + 2) * sizeof(uint32_t)); - param_in[0] = addr; - param_in[1] = addr + (count * sizeof(uint32_t)); /* last address */ - - memcpy(¶m_in[2], buf, count * sizeof(uint32_t)); - - int retval; - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - count + 2, param_in, 0, NULL, 1); - - free(param_in); - - return retval; -} - -static int mips32_pracc_write_u32(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *buf) -{ - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - - MIPS32_LW(8, NEG16((MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_IN)-4), 15), /* load R8 @ param_in[1] = data */ - MIPS32_LW(9, NEG16(MIPS32_PRACC_STACK-MIPS32_PRACC_PARAM_IN), 15), /* load R9 @ param_in[0] = address */ - - MIPS32_SW(8, 0, 9), /* sw $8,0($9) */ - - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(11)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; - - /* TODO remove array */ - uint32_t param_in[1 + 1]; - param_in[0] = addr; - param_in[1] = *buf; - - return mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - ARRAY_SIZE(param_in), param_in, 0, NULL, 1); -} - -static int mips32_pracc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf) +int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs) { - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - MIPS32_SW(10, 0, 15), /* sw $10,($15) */ - MIPS32_SW(11, 0, 15), /* sw $11,($15) */ - - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(9, 0, 8), /* Load write addr to $9 */ - MIPS32_LW(10, 4, 8), /* Load write count to $10 */ - MIPS32_ADDI(8, 8, 8), /* $8 += 8 */ - /* loop: */ - MIPS32_BEQ(0, 10, 8), /* beq $0, $10, end */ - MIPS32_NOP, - - MIPS32_LW(11, 0, 8), /* lw $11,0($8), Load $11 with the word @mem[$8] */ - MIPS32_SH(11, 0, 9), /* sh $11,0($9) */ - - MIPS32_ADDI(10, 10, NEG16(1)), /* $10-- */ - MIPS32_ADDI(9, 9, 2), /* $9 += 2 */ - MIPS32_ADDI(8, 8, 4), /* $8 += 4 */ - - MIPS32_B(NEG16(8)), /* b loop */ - MIPS32_NOP, - /* end: */ - MIPS32_LW(11, 0, 15), /* lw $11,($15) */ - MIPS32_LW(10, 0, 15), /* lw $10,($15) */ - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(26)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ + struct pracc_queue_info ctx = {.ejtag_info = ejtag_info}; + pracc_queue_init(&ctx); + + uint32_t cp0_write_code[] = { + MIPS32_MTC0(ctx.isa, 1, 12, 0), /* move $1 to status */ + MIPS32_MTLO(ctx.isa, 1), /* move $1 to lo */ + MIPS32_MTHI(ctx.isa, 1), /* move $1 to hi */ + MIPS32_MTC0(ctx.isa, 1, 8, 0), /* move $1 to badvaddr */ + MIPS32_MTC0(ctx.isa, 1, 13, 0), /* move $1 to cause*/ + MIPS32_MTC0(ctx.isa, 1, 24, 0), /* move $1 to depc (pc) */ }; - /* TODO remove array */ - uint32_t *param_in = malloc((count + 2) * sizeof(uint32_t)); - int i; - param_in[0] = addr; - param_in[1] = count; - - for (i = 0; i < count; i++) - param_in[i + 2] = buf[i]; + /* load registers 2 to 31 with li32, optimize */ + for (int i = 2; i < 32; i++) + pracc_add_li32(&ctx, i, regs[i], 1); - int retval; - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - count + 2, param_in, 0, NULL, 1); + for (int i = 0; i != 6; i++) { + pracc_add_li32(&ctx, 1, regs[i + 32], 0); /* load CPO value in $1 */ + pracc_add(&ctx, 0, cp0_write_code[i]); /* write value from $1 to CPO register */ + } + pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 15, 31, 0)); /* load $15 in DeSave */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 1, UPPER16((regs[1])))); /* load upper half word in $1 */ + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 1, 1, LOWER16((regs[1])))); /* load lower half word in $1 */ - free(param_in); + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 1); - return retval; + ejtag_info->reg8 = regs[8]; + ejtag_info->reg9 = regs[9]; + pracc_queue_free(&ctx); + return ctx.retval; } -static int mips32_pracc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf) +int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs) { - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(8, 0, 15), /* sw $8,($15) */ - MIPS32_SW(9, 0, 15), /* sw $9,($15) */ - MIPS32_SW(10, 0, 15), /* sw $10,($15) */ - MIPS32_SW(11, 0, 15), /* sw $11,($15) */ - - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(9, 0, 8), /* Load write addr to $9 */ - MIPS32_LW(10, 4, 8), /* Load write count to $10 */ - MIPS32_ADDI(8, 8, 8), /* $8 += 8 */ - /* loop: */ - MIPS32_BEQ(0, 10, 8), /* beq $0, $10, end */ - MIPS32_NOP, - - MIPS32_LW(11, 0, 8), /* lw $11,0($8), Load $11 with the word @mem[$8] */ - MIPS32_SB(11, 0, 9), /* sb $11,0($9) */ - - MIPS32_ADDI(10, 10, NEG16(1)), /* $10-- */ - MIPS32_ADDI(9, 9, 1), /* $9 += 1 */ - MIPS32_ADDI(8, 8, 4), /* $8 += 4 */ - - MIPS32_B(NEG16(8)), /* b loop */ - MIPS32_NOP, - /* end: */ - MIPS32_LW(11, 0, 15), /* lw $11,($15) */ - MIPS32_LW(10, 0, 15), /* lw $10,($15) */ - MIPS32_LW(9, 0, 15), /* lw $9,($15) */ - MIPS32_LW(8, 0, 15), /* lw $8,($15) */ - MIPS32_B(NEG16(26)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ + struct pracc_queue_info ctx = {.ejtag_info = ejtag_info}; + pracc_queue_init(&ctx); + + uint32_t cp0_read_code[] = { + MIPS32_MFC0(ctx.isa, 8, 12, 0), /* move status to $8 */ + MIPS32_MFLO(ctx.isa, 8), /* move lo to $8 */ + MIPS32_MFHI(ctx.isa, 8), /* move hi to $8 */ + MIPS32_MFC0(ctx.isa, 8, 8, 0), /* move badvaddr to $8 */ + MIPS32_MFC0(ctx.isa, 8, 13, 0), /* move cause to $8 */ + MIPS32_MFC0(ctx.isa, 8, 24, 0), /* move depc (pc) to $8 */ }; - /* TODO remove array */ - uint32_t *param_in = malloc((count + 2) * sizeof(uint32_t)); - int retval; - int i; - param_in[0] = addr; - param_in[1] = count; - - for (i = 0; i < count; i++) - param_in[i + 2] = buf[i]; + pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 1, 31, 0)); /* move $1 to COP0 DeSave */ + pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 1, PRACC_UPPER_BASE_ADDR)); /* $1 = MIP32_PRACC_BASE_ADDR */ - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - count + 2, param_in, 0, NULL, 1); - - free(param_in); - - return retval; -} + for (int i = 2; i != 32; i++) /* store GPR's 2 to 31 */ + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + (i * 4), + MIPS32_SW(ctx.isa, i, PRACC_OUT_OFFSET + (i * 4), 1)); -int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs) -{ - static const uint32_t code[] = { - /* start: */ - MIPS32_LUI(2, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $2 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(2, 2, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(1, 1*4, 2), /* lw $1,1*4($2) */ - MIPS32_LW(15, 15*4, 2), /* lw $15,15*4($2) */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(1, 0, 15), /* sw $1,($15) */ - MIPS32_LUI(1, UPPER16(MIPS32_PRACC_PARAM_IN)), /* $1 = MIPS32_PRACC_PARAM_IN */ - MIPS32_ORI(1, 1, LOWER16(MIPS32_PRACC_PARAM_IN)), - MIPS32_LW(3, 3*4, 1), /* lw $3,3*4($1) */ - MIPS32_LW(4, 4*4, 1), /* lw $4,4*4($1) */ - MIPS32_LW(5, 5*4, 1), /* lw $5,5*4($1) */ - MIPS32_LW(6, 6*4, 1), /* lw $6,6*4($1) */ - MIPS32_LW(7, 7*4, 1), /* lw $7,7*4($1) */ - MIPS32_LW(8, 8*4, 1), /* lw $8,8*4($1) */ - MIPS32_LW(9, 9*4, 1), /* lw $9,9*4($1) */ - MIPS32_LW(10, 10*4, 1), /* lw $10,10*4($1) */ - MIPS32_LW(11, 11*4, 1), /* lw $11,11*4($1) */ - MIPS32_LW(12, 12*4, 1), /* lw $12,12*4($1) */ - MIPS32_LW(13, 13*4, 1), /* lw $13,13*4($1) */ - MIPS32_LW(14, 14*4, 1), /* lw $14,14*4($1) */ - MIPS32_LW(16, 16*4, 1), /* lw $16,16*4($1) */ - MIPS32_LW(17, 17*4, 1), /* lw $17,17*4($1) */ - MIPS32_LW(18, 18*4, 1), /* lw $18,18*4($1) */ - MIPS32_LW(19, 19*4, 1), /* lw $19,19*4($1) */ - MIPS32_LW(20, 20*4, 1), /* lw $20,20*4($1) */ - MIPS32_LW(21, 21*4, 1), /* lw $21,21*4($1) */ - MIPS32_LW(22, 22*4, 1), /* lw $22,22*4($1) */ - MIPS32_LW(23, 23*4, 1), /* lw $23,23*4($1) */ - MIPS32_LW(24, 24*4, 1), /* lw $24,24*4($1) */ - MIPS32_LW(25, 25*4, 1), /* lw $25,25*4($1) */ - MIPS32_LW(26, 26*4, 1), /* lw $26,26*4($1) */ - MIPS32_LW(27, 27*4, 1), /* lw $27,27*4($1) */ - MIPS32_LW(28, 28*4, 1), /* lw $28,28*4($1) */ - MIPS32_LW(29, 29*4, 1), /* lw $29,29*4($1) */ - MIPS32_LW(30, 30*4, 1), /* lw $30,30*4($1) */ - MIPS32_LW(31, 31*4, 1), /* lw $31,31*4($1) */ - - MIPS32_LW(2, 32*4, 1), /* lw $2,32*4($1) */ - MIPS32_MTC0(2, 12, 0), /* move $2 to status */ - MIPS32_LW(2, 33*4, 1), /* lw $2,33*4($1) */ - MIPS32_MTLO(2), /* move $2 to lo */ - MIPS32_LW(2, 34*4, 1), /* lw $2,34*4($1) */ - MIPS32_MTHI(2), /* move $2 to hi */ - MIPS32_LW(2, 35*4, 1), /* lw $2,35*4($1) */ - MIPS32_MTC0(2, 8, 0), /* move $2 to badvaddr */ - MIPS32_LW(2, 36*4, 1), /* lw $2,36*4($1) */ - MIPS32_MTC0(2, 13, 0), /* move $2 to cause*/ - MIPS32_LW(2, 37*4, 1), /* lw $2,37*4($1) */ - MIPS32_MTC0(2, 24, 0), /* move $2 to depc (pc) */ - - MIPS32_LW(2, 2*4, 1), /* lw $2,2*4($1) */ - MIPS32_LW(1, 0, 15), /* lw $1,($15) */ - MIPS32_B(NEG16(53)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; + for (int i = 0; i != 6; i++) { + pracc_add(&ctx, 0, cp0_read_code[i]); /* load COP0 needed registers to $8 */ + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + (i + 32) * 4, /* store $8 at PARAM OUT */ + MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + (i + 32) * 4, 1)); + } + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 8, 31, 0)); /* move DeSave to $8, reg1 value */ + pracc_add(&ctx, MIPS32_PRACC_PARAM_OUT + 4, /* store reg1 value from $8 to param out */ + MIPS32_SW(ctx.isa, 8, PRACC_OUT_OFFSET + 4, 1)); - int retval; + pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 1, 31, 0)); /* move COP0 DeSave to $1, restore reg1 */ + pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa))); /* jump to start */ + pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 15, 31, 0)); /* load $15 in DeSave */ - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - MIPS32NUMCOREREGS, regs, 0, NULL, 1); + ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, regs, 1); - return retval; -} - -int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs) -{ - static const uint32_t code[] = { - /* start: */ - MIPS32_MTC0(2, 31, 0), /* move $2 to COP0 DeSave */ - MIPS32_LUI(2, UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $2 = MIPS32_PRACC_PARAM_OUT */ - MIPS32_ORI(2, 2, LOWER16(MIPS32_PRACC_PARAM_OUT)), - MIPS32_SW(0, 0*4, 2), /* sw $0,0*4($2) */ - MIPS32_SW(1, 1*4, 2), /* sw $1,1*4($2) */ - MIPS32_SW(15, 15*4, 2), /* sw $15,15*4($2) */ - MIPS32_MFC0(2, 31, 0), /* move COP0 DeSave to $2 */ - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(1, 0, 15), /* sw $1,($15) */ - MIPS32_SW(2, 0, 15), /* sw $2,($15) */ - MIPS32_LUI(1, UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */ - MIPS32_ORI(1, 1, LOWER16(MIPS32_PRACC_PARAM_OUT)), - MIPS32_SW(2, 2*4, 1), /* sw $2,2*4($1) */ - MIPS32_SW(3, 3*4, 1), /* sw $3,3*4($1) */ - MIPS32_SW(4, 4*4, 1), /* sw $4,4*4($1) */ - MIPS32_SW(5, 5*4, 1), /* sw $5,5*4($1) */ - MIPS32_SW(6, 6*4, 1), /* sw $6,6*4($1) */ - MIPS32_SW(7, 7*4, 1), /* sw $7,7*4($1) */ - MIPS32_SW(8, 8*4, 1), /* sw $8,8*4($1) */ - MIPS32_SW(9, 9*4, 1), /* sw $9,9*4($1) */ - MIPS32_SW(10, 10*4, 1), /* sw $10,10*4($1) */ - MIPS32_SW(11, 11*4, 1), /* sw $11,11*4($1) */ - MIPS32_SW(12, 12*4, 1), /* sw $12,12*4($1) */ - MIPS32_SW(13, 13*4, 1), /* sw $13,13*4($1) */ - MIPS32_SW(14, 14*4, 1), /* sw $14,14*4($1) */ - MIPS32_SW(16, 16*4, 1), /* sw $16,16*4($1) */ - MIPS32_SW(17, 17*4, 1), /* sw $17,17*4($1) */ - MIPS32_SW(18, 18*4, 1), /* sw $18,18*4($1) */ - MIPS32_SW(19, 19*4, 1), /* sw $19,19*4($1) */ - MIPS32_SW(20, 20*4, 1), /* sw $20,20*4($1) */ - MIPS32_SW(21, 21*4, 1), /* sw $21,21*4($1) */ - MIPS32_SW(22, 22*4, 1), /* sw $22,22*4($1) */ - MIPS32_SW(23, 23*4, 1), /* sw $23,23*4($1) */ - MIPS32_SW(24, 24*4, 1), /* sw $24,24*4($1) */ - MIPS32_SW(25, 25*4, 1), /* sw $25,25*4($1) */ - MIPS32_SW(26, 26*4, 1), /* sw $26,26*4($1) */ - MIPS32_SW(27, 27*4, 1), /* sw $27,27*4($1) */ - MIPS32_SW(28, 28*4, 1), /* sw $28,28*4($1) */ - MIPS32_SW(29, 29*4, 1), /* sw $29,29*4($1) */ - MIPS32_SW(30, 30*4, 1), /* sw $30,30*4($1) */ - MIPS32_SW(31, 31*4, 1), /* sw $31,31*4($1) */ - - MIPS32_MFC0(2, 12, 0), /* move status to $2 */ - MIPS32_SW(2, 32*4, 1), /* sw $2,32*4($1) */ - MIPS32_MFLO(2), /* move lo to $2 */ - MIPS32_SW(2, 33*4, 1), /* sw $2,33*4($1) */ - MIPS32_MFHI(2), /* move hi to $2 */ - MIPS32_SW(2, 34*4, 1), /* sw $2,34*4($1) */ - MIPS32_MFC0(2, 8, 0), /* move badvaddr to $2 */ - MIPS32_SW(2, 35*4, 1), /* sw $2,35*4($1) */ - MIPS32_MFC0(2, 13, 0), /* move cause to $2 */ - MIPS32_SW(2, 36*4, 1), /* sw $2,36*4($1) */ - MIPS32_MFC0(2, 24, 0), /* move depc (pc) to $2 */ - MIPS32_SW(2, 37*4, 1), /* sw $2,37*4($1) */ - - MIPS32_LW(2, 0, 15), /* lw $2,($15) */ - MIPS32_LW(1, 0, 15), /* lw $1,($15) */ - MIPS32_B(NEG16(58)), /* b start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; - - int retval; - - retval = mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, - 0, NULL, MIPS32NUMCOREREGS, regs, 1); - - return retval; + ejtag_info->reg8 = regs[8]; /* reg8 is saved but not restored, next called function should restore it */ + ejtag_info->reg9 = regs[9]; + pracc_queue_free(&ctx); + return ctx.retval; } /* fastdata upload/download requires an initialized working area @@ -1239,71 +921,61 @@ int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs) int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source, int write_t, uint32_t addr, int count, uint32_t *buf) { + uint32_t isa = ejtag_info->isa ? 1 : 0; uint32_t handler_code[] = { - /* caution when editing, table is modified below */ /* r15 points to the start of this code */ - MIPS32_SW(8, MIPS32_FASTDATA_HANDLER_SIZE - 4, 15), - MIPS32_SW(9, MIPS32_FASTDATA_HANDLER_SIZE - 8, 15), - MIPS32_SW(10, MIPS32_FASTDATA_HANDLER_SIZE - 12, 15), - MIPS32_SW(11, MIPS32_FASTDATA_HANDLER_SIZE - 16, 15), + MIPS32_SW(isa, 8, MIPS32_FASTDATA_HANDLER_SIZE - 4, 15), + MIPS32_SW(isa, 9, MIPS32_FASTDATA_HANDLER_SIZE - 8, 15), + MIPS32_SW(isa, 10, MIPS32_FASTDATA_HANDLER_SIZE - 12, 15), + MIPS32_SW(isa, 11, MIPS32_FASTDATA_HANDLER_SIZE - 16, 15), /* start of fastdata area in t0 */ - MIPS32_LUI(8, UPPER16(MIPS32_PRACC_FASTDATA_AREA)), - MIPS32_ORI(8, 8, LOWER16(MIPS32_PRACC_FASTDATA_AREA)), - MIPS32_LW(9, 0, 8), /* start addr in t1 */ - MIPS32_LW(10, 0, 8), /* end addr to t2 */ - /* loop: */ - /* 8 */ MIPS32_LW(11, 0, 0), /* lw t3,[t8 | r9] */ - /* 9 */ MIPS32_SW(11, 0, 0), /* sw t3,[r9 | r8] */ - MIPS32_BNE(10, 9, NEG16(3)), /* bne $t2,t1,loop */ - MIPS32_ADDI(9, 9, 4), /* addi t1,t1,4 */ - - MIPS32_LW(8, MIPS32_FASTDATA_HANDLER_SIZE - 4, 15), - MIPS32_LW(9, MIPS32_FASTDATA_HANDLER_SIZE - 8, 15), - MIPS32_LW(10, MIPS32_FASTDATA_HANDLER_SIZE - 12, 15), - MIPS32_LW(11, MIPS32_FASTDATA_HANDLER_SIZE - 16, 15), - - MIPS32_LUI(15, UPPER16(MIPS32_PRACC_TEXT)), - MIPS32_ORI(15, 15, LOWER16(MIPS32_PRACC_TEXT)), - MIPS32_JR(15), /* jr start */ - MIPS32_MFC0(15, 31, 0), /* move COP0 DeSave to $15 */ - }; - - uint32_t jmp_code[] = { - MIPS32_MTC0(15, 31, 0), /* move $15 to COP0 DeSave */ - /* 1 */ MIPS32_LUI(15, 0), /* addr of working area added below */ - /* 2 */ MIPS32_ORI(15, 15, 0), /* addr of working area added below */ - MIPS32_JR(15), /* jump to ram program */ - MIPS32_NOP, + MIPS32_LUI(isa, 8, UPPER16(MIPS32_PRACC_FASTDATA_AREA)), + MIPS32_ORI(isa, 8, 8, LOWER16(MIPS32_PRACC_FASTDATA_AREA)), + MIPS32_LW(isa, 9, 0, 8), /* start addr in t1 */ + MIPS32_LW(isa, 10, 0, 8), /* end addr to t2 */ + /* loop: */ + write_t ? MIPS32_LW(isa, 11, 0, 8) : MIPS32_LW(isa, 11, 0, 9), /* from xfer area : from memory */ + write_t ? MIPS32_SW(isa, 11, 0, 9) : MIPS32_SW(isa, 11, 0, 8), /* to memory : to xfer area */ + + MIPS32_BNE(isa, 10, 9, NEG16(3 << isa)), /* bne $t2,t1,loop */ + MIPS32_ADDI(isa, 9, 9, 4), /* addi t1,t1,4 */ + + MIPS32_LW(isa, 8, MIPS32_FASTDATA_HANDLER_SIZE - 4, 15), + MIPS32_LW(isa, 9, MIPS32_FASTDATA_HANDLER_SIZE - 8, 15), + MIPS32_LW(isa, 10, MIPS32_FASTDATA_HANDLER_SIZE - 12, 15), + MIPS32_LW(isa, 11, MIPS32_FASTDATA_HANDLER_SIZE - 16, 15), + + MIPS32_LUI(isa, 15, UPPER16(MIPS32_PRACC_TEXT)), + MIPS32_ORI(isa, 15, 15, LOWER16(MIPS32_PRACC_TEXT) | isa), /* isa bit for JR instr */ + MIPS32_JR(isa, 15), /* jr start */ + MIPS32_MFC0(isa, 15, 31, 0), /* move COP0 DeSave to $15 */ }; - int retval, i; - uint32_t val, ejtag_ctrl, address; - if (source->size < MIPS32_FASTDATA_HANDLER_SIZE) return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; - if (write_t) { - handler_code[8] = MIPS32_LW(11, 0, 8); /* load data from probe at fastdata area */ - handler_code[9] = MIPS32_SW(11, 0, 9); /* store data to RAM @ r9 */ - } else { - handler_code[8] = MIPS32_LW(11, 0, 9); /* load data from RAM @ r9 */ - handler_code[9] = MIPS32_SW(11, 0, 8); /* store data to probe at fastdata area */ - } - - /* write program into RAM */ + pracc_swap16_array(ejtag_info, handler_code, ARRAY_SIZE(handler_code)); + /* write program into RAM */ if (write_t != ejtag_info->fast_access_save) { - mips32_pracc_write_mem32(ejtag_info, source->address, ARRAY_SIZE(handler_code), handler_code); + mips32_pracc_write_mem(ejtag_info, source->address, 4, ARRAY_SIZE(handler_code), handler_code); /* save previous operation to speed to any consecutive read/writes */ ejtag_info->fast_access_save = write_t; } - LOG_DEBUG("%s using 0x%.8" PRIx32 " for write handler", __func__, source->address); + LOG_DEBUG("%s using 0x%.8" TARGET_PRIxADDR " for write handler", __func__, source->address); - jmp_code[1] |= UPPER16(source->address); - jmp_code[2] |= LOWER16(source->address); + uint32_t jmp_code[] = { + MIPS32_LUI(isa, 15, UPPER16(source->address)), /* load addr of jump in $15 */ + MIPS32_ORI(isa, 15, 15, LOWER16(source->address) | isa), /* isa bit for JR instr */ + MIPS32_JR(isa, 15), /* jump to ram program */ + isa ? MIPS32_XORI(isa, 15, 15, 1) : MIPS32_NOP, /* drop isa bit, needed for LW/SW instructions */ + }; - for (i = 0; i < (int) ARRAY_SIZE(jmp_code); i++) { - retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl); + pracc_swap16_array(ejtag_info, jmp_code, ARRAY_SIZE(jmp_code)); + + /* execute jump code, with no address check */ + for (unsigned i = 0; i < ARRAY_SIZE(jmp_code); i++) { + int retval = wait_for_pracc_rw(ejtag_info); if (retval != ERROR_OK) return retval; @@ -1311,43 +983,39 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are mips_ejtag_drscan_32_out(ejtag_info, jmp_code[i]); /* Clear the access pending bit (let the processor eat!) */ - ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC; - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); - mips_ejtag_drscan_32_out(ejtag_info, ejtag_ctrl); + mips32_pracc_finish(ejtag_info); } - retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl); + /* wait PrAcc pending bit for FASTDATA write, read address */ + int retval = mips32_pracc_read_ctrl_addr(ejtag_info); if (retval != ERROR_OK) return retval; /* next fetch to dmseg should be in FASTDATA_AREA, check */ - address = 0; - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS); - retval = mips_ejtag_drscan_32(ejtag_info, &address); - if (retval != ERROR_OK) - return retval; - - if (address != MIPS32_PRACC_FASTDATA_AREA) + if (ejtag_info->pa_addr != MIPS32_PRACC_FASTDATA_AREA) return ERROR_FAIL; - /* wait PrAcc pending bit for FASTDATA write */ - retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl); - if (retval != ERROR_OK) - return retval; - /* Send the load start address */ - val = addr; + uint32_t val = addr; mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA); mips_ejtag_fastdata_scan(ejtag_info, 1, &val); + retval = wait_for_pracc_rw(ejtag_info); + if (retval != ERROR_OK) + return retval; + /* Send the load end address */ val = addr + (count - 1) * 4; + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA); mips_ejtag_fastdata_scan(ejtag_info, 1, &val); - for (i = 0; i < count; i++) { - retval = mips_ejtag_fastdata_scan(ejtag_info, write_t, buf++); - if (retval != ERROR_OK) - return retval; + unsigned num_clocks = 0; /* like in legacy code */ + if (ejtag_info->mode != 0) + num_clocks = ((uint64_t)(ejtag_info->scan_delay) * jtag_get_speed_khz() + 500000) / 1000000; + + for (int i = 0; i < count; i++) { + jtag_add_clocks(num_clocks); + mips_ejtag_fastdata_scan(ejtag_info, write_t, buf++); } retval = jtag_execute_queue(); @@ -1356,17 +1024,11 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are return retval; } - retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl); - if (retval != ERROR_OK) - return retval; - - address = 0; - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS); - retval = mips_ejtag_drscan_32(ejtag_info, &address); + retval = mips32_pracc_read_ctrl_addr(ejtag_info); if (retval != ERROR_OK) return retval; - if (address != MIPS32_PRACC_TEXT) + if (ejtag_info->pa_addr != MIPS32_PRACC_TEXT) LOG_ERROR("mini program did not return to start"); return retval;