X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips32_pracc.h;h=cc11540b8dc930e4365564440c0a4a277c7c9ff6;hp=da0274b8fa8b97199a314f2140cff91ce325d2c4;hb=2b66816a4d88f1c15468b3d307b59f1242a6a4be;hpb=86173cdbddde781b19ac630602f2d450a59b32b5
diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index da0274b8fa..cc11540b8d 100644
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -4,6 +4,9 @@
* *
* Copyright (C) 2008 by David T.L. Wong *
* *
+ * Copyright (C) 2011 by Drasko DRASKOVIC *
+ * drasko.draskovic@gmail.com *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -15,44 +18,107 @@
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see . *
***************************************************************************/
-#ifndef MIPS32_PRACC_H
-#define MIPS32_PRACC_H
-#include "mips_ejtag.h"
+#ifndef OPENOCD_TARGET_MIPS32_PRACC_H
+#define OPENOCD_TARGET_MIPS32_PRACC_H
+
+#include
+#include
+
+#define MIPS32_PRACC_FASTDATA_AREA 0xFF200000
+#define MIPS32_PRACC_FASTDATA_SIZE 16
+#define MIPS32_PRACC_BASE_ADDR 0xFF200000
+#define MIPS32_PRACC_TEXT 0xFF200200
+#define MIPS32_PRACC_PARAM_OUT 0xFF202000
+
+#define PRACC_UPPER_BASE_ADDR (MIPS32_PRACC_BASE_ADDR >> 16)
+#define PRACC_MAX_CODE (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)
+#define PRACC_MAX_INSTRUCTIONS (PRACC_MAX_CODE / 4)
+#define PRACC_OUT_OFFSET (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_BASE_ADDR)
+
+#define MIPS32_FASTDATA_HANDLER_SIZE 0x80
+#define UPPER16(addr) ((addr) >> 16)
+#define LOWER16(addr) ((addr) & 0xFFFF)
+#define NEG16(v) (((~(v)) + 1) & 0xFFFF)
+#define SWAP16(v) ((LOWER16(v) << 16) | (UPPER16(v)))
+/*#define NEG18(v) (((~(v)) + 1) & 0x3FFFF)*/
+
+#define PRACC_BLOCK 128 /* 1 Kbyte */
+
+typedef struct {
+ uint32_t instr;
+ uint32_t addr;
+} pa_list;
+
+struct pracc_queue_info {
+ struct mips_ejtag *ejtag_info;
+ unsigned isa;
+ int retval;
+ int code_count;
+ int store_count;
+ int max_code; /* max intstructions with currently allocated memory */
+ pa_list *pracc_list; /* Code and store addresses at dmseg */
+};
-#define MIPS32_PRACC_TEXT 0xFF200200
-//#define MIPS32_PRACC_STACK 0xFF2FFFFC
-#define MIPS32_PRACC_STACK 0xFF204000
-#define MIPS32_PRACC_PARAM_IN 0xFF201000
-#define MIPS32_PRACC_PARAM_IN_SIZE 0x1000
-#define MIPS32_PRACC_PARAM_OUT (MIPS32_PRACC_PARAM_IN + MIPS32_PRACC_PARAM_IN_SIZE)
-#define MIPS32_PRACC_PARAM_OUT_SIZE 0x1000
+void pracc_queue_init(struct pracc_queue_info *ctx);
+void pracc_add(struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr);
+void pracc_add_li32(struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize);
+void pracc_queue_free(struct pracc_queue_info *ctx);
+int mips32_pracc_queue_exec(struct mips_ejtag *ejtag_info,
+ struct pracc_queue_info *ctx, uint32_t *buf, bool check_last);
-#define UPPER16(u32) (u32 >> 16)
-#define LOWER16(u32) (u32 & 0xFFFF)
-#define NEG16(v) (((~(v)) + 1) & 0xFFFF)
-/*#define NEG18(v) ( ((~(v)) + 1) & 0x3FFFF )*/
+int mips32_pracc_read_mem(struct mips_ejtag *ejtag_info,
+ uint32_t addr, int size, int count, void *buf);
+int mips32_pracc_write_mem(struct mips_ejtag *ejtag_info,
+ uint32_t addr, int size, int count, const void *buf);
+int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source,
+ int write_t, uint32_t addr, int count, uint32_t *buf);
-extern int mips32_pracc_read_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf);
-extern int mips32_pracc_write_mem(mips_ejtag_t *ejtag_info, u32 addr, int size, int count, void *buf);
+int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
+int mips32_pracc_write_regs(struct mips_ejtag *ejtag_info, uint32_t *regs);
-extern int mips32_pracc_read_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
-extern int mips32_pracc_read_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
-extern int mips32_pracc_read_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
-extern int mips32_pracc_read_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf);
+int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx,
+ uint32_t *param_out, bool check_last);
-extern int mips32_pracc_write_mem8(mips_ejtag_t *ejtag_info, u32 addr, int count, uint8_t *buf);
-extern int mips32_pracc_write_mem16(mips_ejtag_t *ejtag_info, u32 addr, int count, u16 *buf);
-extern int mips32_pracc_write_mem32(mips_ejtag_t *ejtag_info, u32 addr, int count, u32 *buf);
-extern int mips32_pracc_write_u32(mips_ejtag_t *ejtag_info, u32 addr, u32 *buf);
+/**
+ * \b mips32_cp0_read
+ *
+ * Simulates mfc0 ASM instruction (Move From C0),
+ * i.e. implements copro C0 Register read.
+ *
+ * @param[in] ejtag_info
+ * @param[in] val Storage to hold read value
+ * @param[in] cp0_reg Number of copro C0 register we want to read
+ * @param[in] cp0_sel Select for the given C0 register
+ *
+ * @return ERROR_OK on Sucess, ERROR_FAIL otherwise
+ */
+int mips32_cp0_read(struct mips_ejtag *ejtag_info,
+ uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel);
-extern int mips32_pracc_read_regs(mips_ejtag_t *ejtag_info, u32 *regs);
-extern int mips32_pracc_write_regs(mips_ejtag_t *ejtag_info, u32 *regs);
+/**
+ * \b mips32_cp0_write
+ *
+ * Simulates mtc0 ASM instruction (Move To C0),
+ * i.e. implements copro C0 Register read.
+ *
+ * @param[in] ejtag_info
+ * @param[in] val Value to be written
+ * @param[in] cp0_reg Number of copro C0 register we want to write to
+ * @param[in] cp0_sel Select for the given C0 register
+ *
+ * @return ERROR_OK on Sucess, ERROR_FAIL otherwise
+ */
+int mips32_cp0_write(struct mips_ejtag *ejtag_info,
+ uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);
-extern int mips32_pracc_exec( mips_ejtag_t *ejtag_info, int code_len, u32 *code, int num_param_in, u32 *param_in, int num_param_out, u32 *param_out, int cycle);
+static inline void pracc_swap16_array(struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
+{
+ if (ejtag_info->isa && ejtag_info->endianness)
+ for (int i = 0; i != count; i++)
+ buf[i] = SWAP16(buf[i]);
+}
-#endif
+#endif /* OPENOCD_TARGET_MIPS32_PRACC_H */