X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_ejtag.c;h=6f06d9a3afc79b2b0964e797459307ac3035d158;hp=4c8010b5388e7dce7ce4eae6e515d5fbc6ac92b6;hb=a1777fc6493b4c1879ef133c565327212859d37c;hpb=c6e80f63a3955baed6666e966ab1dd3950ea91b8

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 4c8010b538..6f06d9a3af 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -27,38 +27,34 @@
 #include "mips_ejtag.h"
 
 
-int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_me_and_submit_patch)
+int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr, void *delete_me_and_submit_patch)
 {
-	jtag_tap_t *tap;
+	struct jtag_tap *tap;
 
 	tap = ejtag_info->tap;
-	if (tap==NULL)
+	if (tap == NULL)
 		return ERROR_FAIL;
 
-	if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (u32)new_instr)
+	if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr)
 	{
-		scan_field_t field;
-		u8 t[4];
+		struct scan_field field;
+		uint8_t t[4];
 
 		field.tap = tap;
 		field.num_bits = tap->ir_length;
 		field.out_value = t;
 		buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
-
 		field.in_value = NULL;
-		
-		
-		
-		
+
 		jtag_add_ir_scan(1, &field, jtag_get_end_state());
 	}
 
 	return ERROR_OK;
 }
 
-int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode)
+int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode)
 {
-	scan_field_t field;
+	struct scan_field field;
 
 	jtag_set_end_state(TAP_IDLE);
 
@@ -67,12 +63,8 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode)
 	field.tap = ejtag_info->tap;
 	field.num_bits = 32;
 	field.out_value = NULL;
-
 	field.in_value = (void*)idcode;
-	
-	
-	
-	
+
 	jtag_add_dr_scan(1, &field, jtag_get_end_state());
 
 	if (jtag_execute_queue() != ERROR_OK)
@@ -83,9 +75,9 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode)
 	return ERROR_OK;
 }
 
-int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode)
+int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode)
 {
-	scan_field_t field;
+	struct scan_field field;
 
 	jtag_set_end_state(TAP_IDLE);
 
@@ -94,12 +86,8 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode)
 	field.tap = ejtag_info->tap;
 	field.num_bits = 32;
 	field.out_value = NULL;
-
 	field.in_value = (void*)impcode;
-	
-	
-	
-	
+
 	jtag_add_dr_scan(1, &field, jtag_get_end_state());
 
 	if (jtag_execute_queue() != ERROR_OK)
@@ -110,27 +98,23 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode)
 	return ERROR_OK;
 }
 
-int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
+int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
 {
-	jtag_tap_t *tap;
+	struct jtag_tap *tap;
 	tap  = ejtag_info->tap;
 
-	if (tap==NULL)
+	if (tap == NULL)
 		return ERROR_FAIL;
-	scan_field_t field;
-	u8 t[4], r[4];
+	struct scan_field field;
+	uint8_t t[4], r[4];
 	int retval;
 
 	field.tap = tap;
 	field.num_bits = 32;
 	field.out_value = t;
 	buf_set_u32(field.out_value, 0, field.num_bits, *data);
-
 	field.in_value = r;
-	
-	
-	
-	
+
 	jtag_add_dr_scan(1, &field, jtag_get_end_state());
 
 	if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -146,9 +130,9 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
 	return ERROR_OK;
 }
 
-int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info)
+int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info)
 {
-	u32 code[] = {
+	uint32_t code[] = {
 			MIPS32_MTC0(1,31,0),			/* move $1 to COP0 DeSave */
 			MIPS32_MFC0(1,23,0),			/* move COP0 Debug to $1 */
 			MIPS32_ORI(1,1,0x0100),			/* set SSt bit in debug reg */
@@ -164,9 +148,9 @@ int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info)
 
 	return ERROR_OK;
 }
-int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info)
+int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info)
 {
-	u32 code[] = {
+	uint32_t code[] = {
 			MIPS32_MTC0(15,31,0),							/* move $15 to COP0 DeSave */
 			MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), 	/* $15 = MIPS32_PRACC_STACK */
 			MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
@@ -191,16 +175,16 @@ int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info)
 	return ERROR_OK;
 }
 
-int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step)
+int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step)
 {
 	if (enable_step)
 		return mips_ejtag_step_enable(ejtag_info);
 	return mips_ejtag_step_disable(ejtag_info);
 }
 
-int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info)
+int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
 {
-	u32 ejtag_ctrl;
+	uint32_t ejtag_ctrl;
 	jtag_set_end_state(TAP_IDLE);
 	mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
 
@@ -211,28 +195,28 @@ int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info)
 	/* break bit will be cleared by hardware */
 	ejtag_ctrl = ejtag_info->ejtag_ctrl;
 	mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-	LOG_DEBUG("ejtag_ctrl: 0x%8.8x", ejtag_ctrl);
-	if((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
+	LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
+	if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
 		LOG_DEBUG("Failed to enter Debug Mode!");
 
 	return ERROR_OK;
 }
 
-int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info)
+int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
 {
-	u32 inst;
+	uint32_t inst;
 	inst = MIPS32_DRET;
-	
+
 	/* execute our dret instruction */
 	mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
 
 	return ERROR_OK;
 }
 
-int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, u32* debug_reg)
+int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg)
 {
 	/* read ejtag ECR */
-	u32 code[] = {
+	uint32_t code[] = {
 			MIPS32_MTC0(15,31,0),							/* move $15 to COP0 DeSave */
 			MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), 	/* $15 = MIPS32_PRACC_STACK */
 			MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
@@ -256,12 +240,12 @@ int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, u32* debug_reg)
 	return ERROR_OK;
 }
 
-int mips_ejtag_init(mips_ejtag_t *ejtag_info)
+int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 {
-	u32 ejtag_version;
+	uint32_t ejtag_version;
 
 	mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
-	LOG_DEBUG("impcode: 0x%8.8x", ejtag_info->impcode);
+	LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode);
 
 	/* get ejtag version */
 	ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
@@ -285,16 +269,16 @@ int mips_ejtag_init(mips_ejtag_t *ejtag_info)
 			break;
 	}
 	LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
-		ejtag_info->impcode & (1<<28) ? " R3k":    " R4k",
-		ejtag_info->impcode & (1<<24) ? " DINT":   "",
-		ejtag_info->impcode & (1<<22) ? " ASID_8": "",
-		ejtag_info->impcode & (1<<21) ? " ASID_6": "",
-		ejtag_info->impcode & (1<<16) ? " MIPS16": "",
-		ejtag_info->impcode & (1<<14) ? " noDMA":  " DMA",
-		ejtag_info->impcode & (1<<0)  ? " MIPS64": " MIPS32"
-	);
-
-	if((ejtag_info->impcode & (1<<14)) == 0)
+		ejtag_info->impcode & (1 << 28) ? " R3k":    " R4k",
+		ejtag_info->impcode & (1 << 24) ? " DINT":   "",
+		ejtag_info->impcode & (1 << 22) ? " ASID_8": "",
+		ejtag_info->impcode & (1 << 21) ? " ASID_6": "",
+		ejtag_info->impcode & (1 << 16) ? " MIPS16": "",
+		ejtag_info->impcode & (1 << 14) ? " noDMA":  " DMA",
+		ejtag_info->impcode & (1 << 0)  ? " MIPS64": " MIPS32"
+);
+
+	if ((ejtag_info->impcode & (1 << 14)) == 0)
 		LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
 
 	/* set initial state for ejtag control reg */