X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_ejtag.c;h=794f92f819881acb6f82d73468177d8c86af26e9;hp=3ea23d40c9324362ddaed46d9e1765f71f3199c7;hb=109f37c16176019b00b5a026c4e42cdfeafd2dfd;hpb=b48a94f05da3a887f1978da01db77b79513d4aa9 diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index 3ea23d40c9..794f92f819 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -21,6 +21,7 @@ * Free Software Foundation, Inc., * * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ***************************************************************************/ + #ifdef HAVE_CONFIG_H #include "config.h" #endif @@ -28,94 +29,118 @@ #include "mips32.h" #include "mips_ejtag.h" -int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr) +void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr) { struct jtag_tap *tap; tap = ejtag_info->tap; - if (tap == NULL) - return ERROR_FAIL; + assert(tap != NULL); - if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) - { + if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) { struct scan_field field; uint8_t t[4]; field.num_bits = tap->ir_length; field.out_value = t; - buf_set_u32(field.out_value, 0, field.num_bits, new_instr); + buf_set_u32(t, 0, field.num_bits, new_instr); field.in_value = NULL; - jtag_add_ir_scan(tap, &field, jtag_get_end_state()); + jtag_add_ir_scan(tap, &field, TAP_IDLE); } - - return ERROR_OK; } int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode) { struct scan_field field; - - jtag_set_end_state(TAP_IDLE); + uint8_t r[4]; mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE); field.num_bits = 32; field.out_value = NULL; - field.in_value = (void*)idcode; + field.in_value = r; jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE); - if (jtag_execute_queue() != ERROR_OK) - { + int retval; + retval = jtag_execute_queue(); + if (retval != ERROR_OK) { LOG_ERROR("register read failed"); + return retval; } + *idcode = buf_get_u32(field.in_value, 0, 32); + return ERROR_OK; } -int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode) +static int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode) { struct scan_field field; - - jtag_set_end_state(TAP_IDLE); + uint8_t r[4]; mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE); field.num_bits = 32; field.out_value = NULL; - field.in_value = (void*)impcode; + field.in_value = r; jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE); - if (jtag_execute_queue() != ERROR_OK) - { + int retval; + retval = jtag_execute_queue(); + if (retval != ERROR_OK) { LOG_ERROR("register read failed"); + return retval; } + *impcode = buf_get_u32(field.in_value, 0, 32); + return ERROR_OK; } +void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info, uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf) +{ + assert(ejtag_info->tap != NULL); + struct jtag_tap *tap = ejtag_info->tap; + + struct scan_field field; + uint8_t out_scan[12]; + + /* processor access "all" register 96 bit */ + field.num_bits = 96; + + field.out_value = out_scan; + buf_set_u32(out_scan, 0, 32, ctrl); + buf_set_u32(out_scan + 4, 0, 32, data); + buf_set_u32(out_scan + 8, 0, 32, 0); + + field.in_value = in_scan_buf; + + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); + + keep_alive(); +} + int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data) { struct jtag_tap *tap; tap = ejtag_info->tap; + assert(tap != NULL); - if (tap == NULL) - return ERROR_FAIL; struct scan_field field; uint8_t t[4], r[4]; int retval; field.num_bits = 32; field.out_value = t; - buf_set_u32(field.out_value, 0, field.num_bits, *data); + buf_set_u32(t, 0, field.num_bits, *data); field.in_value = r; - jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state()); + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); - if ((retval = jtag_execute_queue()) != ERROR_OK) - { + retval = jtag_execute_queue(); + if (retval != ERROR_OK) { LOG_ERROR("register read failed"); return retval; } @@ -127,89 +152,98 @@ int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data) return ERROR_OK; } +void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data) +{ + uint8_t t[4]; + struct jtag_tap *tap; + tap = ejtag_info->tap; + assert(tap != NULL); + + struct scan_field field; + + field.num_bits = 32; + field.out_value = t; + buf_set_u32(t, 0, field.num_bits, data); + + field.in_value = NULL; + + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); +} + int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data) { struct jtag_tap *tap; tap = ejtag_info->tap; + assert(tap != NULL); - if (tap == NULL) - return ERROR_FAIL; struct scan_field field; uint8_t t[4] = {0, 0, 0, 0}, r[4]; int retval; field.num_bits = 8; field.out_value = t; - buf_set_u32(field.out_value, 0, field.num_bits, *data); + buf_set_u32(t, 0, field.num_bits, *data); field.in_value = r; - jtag_add_dr_scan(tap, 1, &field, jtag_get_end_state()); + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); - if ((retval = jtag_execute_queue()) != ERROR_OK) - { + retval = jtag_execute_queue(); + if (retval != ERROR_OK) { LOG_ERROR("register read failed"); return retval; } *data = buf_get_u32(field.in_value, 0, 32); - keep_alive(); - return ERROR_OK; } -int mips_ejtag_step_enable(struct mips_ejtag *ejtag_info) +void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data) { - static const uint32_t code[] = { - MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */ - MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */ - MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */ - MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */ - MIPS32_B(NEG16(5)), - MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */ - }; - - mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ - 0, NULL, 0, NULL, 1); + struct jtag_tap *tap; + tap = ejtag_info->tap; + assert(tap != NULL); - return ERROR_OK; -} -int mips_ejtag_step_disable(struct mips_ejtag *ejtag_info) -{ - static const uint32_t code[] = { - MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(1,0,15), /* sw $1,($15) */ - MIPS32_SW(2,0,15), /* sw $2,($15) */ - MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */ - MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */ - MIPS32_ORI(2,2,0xFEFF), - MIPS32_AND(1,1,2), - MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */ - MIPS32_LW(2,0,15), - MIPS32_LW(1,0,15), - MIPS32_B(NEG16(13)), - MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */ - }; - - mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ - 0, NULL, 0, NULL, 1); + struct scan_field field; - return ERROR_OK; + field.num_bits = 8; + field.out_value = &data; + field.in_value = NULL; + + jtag_add_dr_scan(tap, 1, &field, TAP_IDLE); } +/* Set (to enable) or clear (to disable stepping) the SSt bit (bit 8) in Cp0 Debug reg (reg 23, sel 0) */ int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step) { - if (enable_step) - return mips_ejtag_step_enable(ejtag_info); - return mips_ejtag_step_disable(ejtag_info); + int code_len = enable_step ? 6 : 7; + + uint32_t *code = malloc(code_len * sizeof(uint32_t)); + if (code == NULL) { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } + uint32_t *code_p = code; + + *code_p++ = MIPS32_MTC0(1, 31, 0); /* move $1 to COP0 DeSave */ + *code_p++ = MIPS32_MFC0(1, 23, 0), /* move COP0 Debug to $1 */ + *code_p++ = MIPS32_ORI(1, 1, 0x0100); /* set SSt bit in debug reg */ + if (!enable_step) + *code_p++ = MIPS32_XORI(1, 1, 0x0100); /* clear SSt bit in debug reg */ + + *code_p++ = MIPS32_MTC0(1, 23, 0); /* move $1 to COP0 Debug */ + *code_p++ = MIPS32_B(NEG16((code_len - 1))); /* jump to start */ + *code_p = MIPS32_MFC0(1, 31, 0); /* move COP0 DeSave to $1 */ + + int retval = mips32_pracc_exec(ejtag_info, code_len, code, 0, NULL, 0, NULL, 1); + + free(code); + return retval; } int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info) { uint32_t ejtag_ctrl; - jtag_set_end_state(TAP_IDLE); mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); /* set debug break bit */ @@ -220,8 +254,10 @@ int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info) ejtag_ctrl = ejtag_info->ejtag_ctrl; mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl); - if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) - LOG_DEBUG("Failed to enter Debug Mode!"); + if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) { + LOG_ERROR("Failed to enter Debug Mode!"); + return ERROR_FAIL; + } return ERROR_OK; } @@ -232,48 +268,28 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info) inst = MIPS32_DRET; /* execute our dret instruction */ - mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0); + int retval = mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0); - return ERROR_OK; -} + /* pic32mx workaround, false pending at low core clock */ + jtag_add_sleep(1000); -int mips_ejtag_read_debug(struct mips_ejtag *ejtag_info, uint32_t* debug_reg) -{ - /* read ejtag ECR */ - static const uint32_t code[] = { - MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */ - MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */ - MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)), - MIPS32_SW(1,0,15), /* sw $1,($15) */ - MIPS32_SW(2,0,15), /* sw $2,($15) */ - MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */ - MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT)), - MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */ - MIPS32_SW(2,0,1), - MIPS32_LW(2,0,15), - MIPS32_LW(1,0,15), - MIPS32_B(NEG16(12)), - MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */ - }; - - mips32_pracc_exec(ejtag_info, ARRAY_SIZE(code), code, \ - 0, NULL, 1, debug_reg, 1); - - return ERROR_OK; + return retval; } int mips_ejtag_init(struct mips_ejtag *ejtag_info) { uint32_t ejtag_version; + int retval; - mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode); + retval = mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode); + if (retval != ERROR_OK) + return retval; LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode); /* get ejtag version */ ejtag_version = ((ejtag_info->impcode >> 29) & 0x07); - switch (ejtag_version) - { + switch (ejtag_version) { case 0: LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected"); break; @@ -286,6 +302,12 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info) case 3: LOG_DEBUG("EJTAG: Version 3.1 Detected"); break; + case 4: + LOG_DEBUG("EJTAG: Version 4.1 Detected"); + break; + case 5: + LOG_DEBUG("EJTAG: Version 5.1 Detected"); + break; default: LOG_DEBUG("EJTAG: Unknown Version Detected"); break; @@ -304,17 +326,17 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info) /* set initial state for ejtag control reg */ ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV; + ejtag_info->fast_access_save = -1; return ERROR_OK; } -int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t *data) +int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data) { struct jtag_tap *tap; - tap = ejtag_info->tap; - if (tap == NULL) - return ERROR_FAIL; + tap = ejtag_info->tap; + assert(tap != NULL); struct scan_field fields[2]; uint8_t spracc = 0; @@ -329,17 +351,18 @@ int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t fields[1].num_bits = 32; fields[1].out_value = t; - if (write) - { + if (write_t) { fields[1].in_value = NULL; buf_set_u32(t, 0, 32, *data); - } - else - { - fields[1].in_value = (uint8_t *) data; - } + } else + fields[1].in_value = (void *) data; + + jtag_add_dr_scan(tap, 2, fields, TAP_IDLE); + + if (!write_t && data) + jtag_add_callback(mips_le_to_h_u32, + (jtag_callback_data_t) data); - jtag_add_dr_scan(tap, 2, fields, jtag_get_end_state()); keep_alive(); return ERROR_OK;