X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=485f4e8c71c05090add1e7355449d1ac8030ae29;hp=fb4c37624135c31a51a9bfd911e1877cb3722071;hb=37a6e402502d698aaf9d4f6d32fe4ccdcc5ff9b6;hpb=2dde122b66b3bf1a4d3c2798fb4b369b66de9309

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index fb4c376241..485f4e8c71 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -90,14 +90,14 @@ static int mips_m4k_debug_entry(struct target *target)
 	/* make sure stepping disabled, SSt bit in CP0 debug register cleared */
 	mips_ejtag_config_step(ejtag_info, 0);
 
+	mips32_save_context(target);
+
 	/* make sure break unit configured */
 	mips32_configure_break_unit(target);
 
 	/* attempt to find halt reason */
 	mips_m4k_examine_debug_reason(target);
 
-	mips32_save_context(target);
-
 	/* default to mips32 isa, it will be changed below if required */
 	mips32->isa_mode = MIPS32_ISA_MIPS32;
 
@@ -558,12 +558,12 @@ static int mips_m4k_step(struct target *target, int current,
 	/* registers are now invalid */
 	register_cache_invalidate(mips32->core_cache);
 
+	LOG_DEBUG("target stepped ");
+	mips_m4k_debug_entry(target);
+
 	if (breakpoint)
 		mips_m4k_set_breakpoint(target, breakpoint);
 
-	LOG_DEBUG("target stepped ");
-
-	mips_m4k_debug_entry(target);
 	target_call_event_callbacks(target, TARGET_EVENT_HALTED);
 
 	return ERROR_OK;