X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=864ede072a4453233cef1c54df190f6060fb4262;hp=07ecb5565d2afa5a56771d47bb62661d32da6930;hb=1d4a09c2ef22dc10ec8a40183b8dd1b1102af20d;hpb=1e8225c7381c958be63197651ecc837e45764d0d diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 07ecb5565d..864ede072a 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -23,33 +23,34 @@ #include "config.h" #endif +#include "breakpoints.h" #include "mips32.h" #include "mips_m4k.h" #include "mips32_dmaacc.h" #include "target_type.h" +#include "register.h" /* cli handling */ /* forward declarations */ -int mips_m4k_poll(target_t *target); -int mips_m4k_halt(struct target_s *target); -int mips_m4k_soft_reset_halt(struct target_s *target); -int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution); -int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints); -int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); -int mips_m4k_register_commands(struct command_context_s *cmd_ctx); -int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target); -int mips_m4k_quit(void); -int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp); - -int mips_m4k_examine(struct target_s *target); -int mips_m4k_assert_reset(target_t *target); -int mips_m4k_deassert_reset(target_t *target); -int mips_m4k_checksum_memory(target_t *target, uint32_t address, uint32_t size, uint32_t *checksum); - -target_type_t mips_m4k_target = +int mips_m4k_poll(struct target *target); +int mips_m4k_halt(struct target *target); +int mips_m4k_soft_reset_halt(struct target *target); +int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution); +int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints); +int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); +int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer); +int mips_m4k_register_commands(struct command_context *cmd_ctx); +int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target); +int mips_m4k_target_create(struct target *target, Jim_Interp *interp); + +int mips_m4k_examine(struct target *target); +int mips_m4k_assert_reset(struct target *target); +int mips_m4k_deassert_reset(struct target *target); +int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum); + +struct target_type mips_m4k_target = { .name = "mips_m4k", @@ -85,10 +86,9 @@ target_type_t mips_m4k_target = .target_create = mips_m4k_target_create, .init_target = mips_m4k_init_target, .examine = mips_m4k_examine, - .quit = mips_m4k_quit }; -int mips_m4k_examine_debug_reason(target_t *target) +int mips_m4k_examine_debug_reason(struct target *target) { uint32_t break_status; int retval; @@ -122,10 +122,10 @@ int mips_m4k_examine_debug_reason(target_t *target) return ERROR_OK; } -int mips_m4k_debug_entry(target_t *target) +int mips_m4k_debug_entry(struct target *target) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; uint32_t debug_reg; /* read debug register */ @@ -148,16 +148,16 @@ int mips_m4k_debug_entry(target_t *target) LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s", *(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value), - Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); + target_state_name(target)); return ERROR_OK; } -int mips_m4k_poll(target_t *target) +int mips_m4k_poll(struct target *target) { int retval; - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl; /* read ejtag control reg */ @@ -214,13 +214,13 @@ int mips_m4k_poll(target_t *target) return ERROR_OK; } -int mips_m4k_halt(struct target_s *target) +int mips_m4k_halt(struct target *target) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("target->state: %s", - Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); + target_state_name(target)); if (target->state == TARGET_HALTED) { @@ -259,13 +259,13 @@ int mips_m4k_halt(struct target_s *target) return ERROR_OK; } -int mips_m4k_assert_reset(target_t *target) +int mips_m4k_assert_reset(struct target *target) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("target->state: %s", - Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); + target_state_name(target)); enum reset_types jtag_reset_config = jtag_get_reset_config(); if (!(jtag_reset_config & RESET_HAS_SRST)) @@ -321,10 +321,10 @@ int mips_m4k_assert_reset(target_t *target) return ERROR_OK; } -int mips_m4k_deassert_reset(target_t *target) +int mips_m4k_deassert_reset(struct target *target) { LOG_DEBUG("target->state: %s", - Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name); + target_state_name(target)); /* deassert reset lines */ jtag_add_reset(0, 0); @@ -332,16 +332,16 @@ int mips_m4k_deassert_reset(target_t *target) return ERROR_OK; } -int mips_m4k_soft_reset_halt(struct target_s *target) +int mips_m4k_soft_reset_halt(struct target *target) { /* TODO */ return ERROR_OK; } -int mips_m4k_single_step_core(target_t *target) +int mips_m4k_single_step_core(struct target *target) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; /* configure single step mode */ mips_ejtag_config_step(ejtag_info, 1); @@ -357,11 +357,11 @@ int mips_m4k_single_step_core(target_t *target) return ERROR_OK; } -int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) +int mips_m4k_resume(struct target *target, int current, uint32_t address, int handle_breakpoints, int debug_execution) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; - breakpoint_t *breakpoint = NULL; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct breakpoint *breakpoint = NULL; uint32_t resume_pc; if (target->state != TARGET_HALTED) @@ -428,12 +428,12 @@ int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int return ERROR_OK; } -int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints) +int mips_m4k_step(struct target *target, int current, uint32_t address, int handle_breakpoints) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; - breakpoint_t *breakpoint = NULL; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct breakpoint *breakpoint = NULL; if (target->state != TARGET_HALTED) { @@ -480,9 +480,9 @@ int mips_m4k_step(struct target_s *target, int current, uint32_t address, int ha return ERROR_OK; } -void mips_m4k_enable_breakpoints(struct target_s *target) +void mips_m4k_enable_breakpoints(struct target *target) { - breakpoint_t *breakpoint = target->breakpoints; + struct breakpoint *breakpoint = target->breakpoints; /* set any pending breakpoints */ while (breakpoint) @@ -493,10 +493,10 @@ void mips_m4k_enable_breakpoints(struct target_s *target) } } -int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *breakpoint) { - mips32_common_t *mips32 = target->arch_info; - mips32_comparator_t * comparator_list = mips32->inst_break_list; + struct mips32_common *mips32 = target->arch_info; + struct mips32_comparator * comparator_list = mips32->inst_break_list; int retval; if (breakpoint->set) @@ -513,9 +513,9 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) bp_num++; if (bp_num >= mips32->num_inst_bpoints) { - LOG_DEBUG("ERROR Can not find free FP Comparator"); - LOG_WARNING("ERROR Can not find free FP Comparator"); - exit(-1); + LOG_ERROR("Can not find free FP Comparator(bpid: %d)", + breakpoint->unique_id ); + return ERROR_FAIL; } breakpoint->set = bp_num + 1; comparator_list[bp_num].used = 1; @@ -523,10 +523,13 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) target_write_u32(target, comparator_list[bp_num].reg_address, comparator_list[bp_num].bp_value); target_write_u32(target, comparator_list[bp_num].reg_address + 0x08, 0x00000000); target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 1); - LOG_DEBUG("bp_num %i bp_value 0x%" PRIx32 "", bp_num, comparator_list[bp_num].bp_value); + LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx32 "", + breakpoint->unique_id, + bp_num, comparator_list[bp_num].bp_value); } else if (breakpoint->type == BKPT_SOFT) { + LOG_DEBUG("bpid: %d", breakpoint->unique_id ); if (breakpoint->length == 4) { uint32_t verify = 0xffffffff; @@ -580,11 +583,11 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) return ERROR_OK; } -int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *breakpoint) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; - mips32_comparator_t * comparator_list = mips32->inst_break_list; + struct mips32_common *mips32 = target->arch_info; + struct mips32_comparator * comparator_list = mips32->inst_break_list; int retval; if (!breakpoint->set) @@ -598,16 +601,22 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) int bp_num = breakpoint->set - 1; if ((bp_num < 0) || (bp_num >= mips32->num_inst_bpoints)) { - LOG_DEBUG("Invalid FP Comparator number in breakpoint"); + LOG_DEBUG("Invalid FP Comparator number in breakpoint (bpid: %d)", + breakpoint->unique_id); return ERROR_OK; } + LOG_DEBUG("bpid: %d - releasing hw: %d", + breakpoint->unique_id, + bp_num ); comparator_list[bp_num].used = 0; comparator_list[bp_num].bp_value = 0; target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 0); + } else { /* restore original instruction (kept in target endianness) */ + LOG_DEBUG("bpid: %d", breakpoint->unique_id); if (breakpoint->length == 4) { uint32_t current_instr; @@ -649,9 +658,9 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint) return ERROR_OK; } -int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *breakpoint) { - mips32_common_t *mips32 = target->arch_info; + struct mips32_common *mips32 = target->arch_info; if (breakpoint->type == BKPT_HARD) { @@ -669,10 +678,10 @@ int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint) return ERROR_OK; } -int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint) +int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *breakpoint) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; + struct mips32_common *mips32 = target->arch_info; if (target->state != TARGET_HALTED) { @@ -691,19 +700,19 @@ int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint return ERROR_OK; } -int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *watchpoint) { - mips32_common_t *mips32 = target->arch_info; - mips32_comparator_t * comparator_list = mips32->data_break_list; + struct mips32_common *mips32 = target->arch_info; + struct mips32_comparator * comparator_list = mips32->data_break_list; int wp_num = 0; /* * watchpoint enabled, ignore all byte lanes in value register * and exclude both load and store accesses from watchpoint * condition evaluation */ - int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE | + int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE | (0xff << EJTAG_DBCn_BLM_SHIFT); - + if (watchpoint->set) { LOG_WARNING("watchpoint already set"); @@ -714,9 +723,8 @@ int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) wp_num++; if (wp_num >= mips32->num_data_bpoints) { - LOG_DEBUG("ERROR Can not find free FP Comparator"); - LOG_WARNING("ERROR Can not find free FP Comparator"); - exit(-1); + LOG_ERROR("Can not find free FP Comparator"); + return ERROR_FAIL; } if (watchpoint->length != 4) @@ -755,16 +763,16 @@ int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint) target_write_u32(target, comparator_list[wp_num].reg_address + 0x18, enable); target_write_u32(target, comparator_list[wp_num].reg_address + 0x20, 0); LOG_DEBUG("wp_num %i bp_value 0x%" PRIx32 "", wp_num, comparator_list[wp_num].bp_value); - + return ERROR_OK; } -int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *watchpoint) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; - mips32_comparator_t * comparator_list = mips32->data_break_list; - + struct mips32_common *mips32 = target->arch_info; + struct mips32_comparator * comparator_list = mips32->data_break_list; + if (!watchpoint->set) { LOG_WARNING("watchpoint not set"); @@ -785,26 +793,26 @@ int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint) return ERROR_OK; } -int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *watchpoint) { - mips32_common_t *mips32 = target->arch_info; + struct mips32_common *mips32 = target->arch_info; if (mips32->num_data_bpoints_avail < 1) { LOG_INFO("no hardware watchpoints available"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } - + mips32->num_data_bpoints_avail--; mips_m4k_set_watchpoint(target, watchpoint); return ERROR_OK; } -int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint) +int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *watchpoint) { /* get pointers to arch-specific information */ - mips32_common_t *mips32 = target->arch_info; + struct mips32_common *mips32 = target->arch_info; if (target->state != TARGET_HALTED) { @@ -822,9 +830,9 @@ int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint return ERROR_OK; } -void mips_m4k_enable_watchpoints(struct target_s *target) +void mips_m4k_enable_watchpoints(struct target *target) { - watchpoint_t *watchpoint = target->watchpoints; + struct watchpoint *watchpoint = target->watchpoints; /* set any pending watchpoints */ while (watchpoint) @@ -835,10 +843,10 @@ void mips_m4k_enable_watchpoints(struct target_s *target) } } -int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +int mips_m4k_read_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count); @@ -864,35 +872,13 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz if (ERROR_OK != retval) return retval; - /* TAP data register is loaded LSB first (little endian) */ - if (target->endianness == TARGET_BIG_ENDIAN) - { - uint32_t i, t32; - uint16_t t16; - - for (i = 0; i < (count*size); i += size) - { - switch (size) - { - case 4: - t32 = le_to_h_u32(&buffer[i]); - h_u32_to_be(&buffer[i], t32); - break; - case 2: - t16 = le_to_h_u16(&buffer[i]); - h_u16_to_be(&buffer[i], t16); - break; - } - } - } - return ERROR_OK; } -int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) +int mips_m4k_write_memory(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer) { - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count); @@ -909,28 +895,6 @@ int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t si if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u))) return ERROR_TARGET_UNALIGNED_ACCESS; - /* TAP data register is loaded LSB first (little endian) */ - if (target->endianness == TARGET_BIG_ENDIAN) - { - uint32_t i, t32; - uint16_t t16; - - for (i = 0; i < (count*size); i += size) - { - switch (size) - { - case 4: - t32 = be_to_h_u32(&buffer[i]); - h_u32_to_le(&buffer[i], t32); - break; - case 2: - t16 = be_to_h_u16(&buffer[i]); - h_u16_to_le(&buffer[i], t16); - break; - } - } - } - /* if noDMA off, use DMAACC mode for memory write */ if (ejtag_info->impcode & EJTAG_IMP_NODMA) return mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer); @@ -938,7 +902,7 @@ int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t si return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer); } -int mips_m4k_register_commands(struct command_context_s *cmd_ctx) +int mips_m4k_register_commands(struct command_context *cmd_ctx) { int retval; @@ -946,21 +910,16 @@ int mips_m4k_register_commands(struct command_context_s *cmd_ctx) return retval; } -int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target) +int mips_m4k_init_target(struct command_context *cmd_ctx, struct target *target) { mips32_build_reg_cache(target); return ERROR_OK; } -int mips_m4k_quit(void) -{ - return ERROR_OK; -} - -int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap) +int mips_m4k_init_arch_info(struct target *target, struct mips_m4k_common *mips_m4k, struct jtag_tap *tap) { - mips32_common_t *mips32 = &mips_m4k->mips32_common; + struct mips32_common *mips32 = &mips_m4k->mips32_common; mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC; @@ -971,20 +930,20 @@ int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_ return ERROR_OK; } -int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp) +int mips_m4k_target_create(struct target *target, Jim_Interp *interp) { - mips_m4k_common_t *mips_m4k = calloc(1,sizeof(mips_m4k_common_t)); + struct mips_m4k_common *mips_m4k = calloc(1,sizeof(struct mips_m4k_common)); mips_m4k_init_arch_info(target, mips_m4k, target->tap); return ERROR_OK; } -int mips_m4k_examine(struct target_s *target) +int mips_m4k_examine(struct target *target) { int retval; - mips32_common_t *mips32 = target->arch_info; - mips_ejtag_t *ejtag_info = &mips32->ejtag_info; + struct mips32_common *mips32 = target->arch_info; + struct mips_ejtag *ejtag_info = &mips32->ejtag_info; uint32_t idcode = 0; if (!target_was_examined(target)) @@ -1011,12 +970,12 @@ int mips_m4k_examine(struct target_s *target) return ERROR_OK; } -int mips_m4k_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, uint8_t *buffer) +int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer) { return mips_m4k_write_memory(target, address, 4, count, buffer); } -int mips_m4k_checksum_memory(target_t *target, uint32_t address, uint32_t size, uint32_t *checksum) +int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum) { return ERROR_FAIL; /* use bulk read method */ }