X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=bd248748bc5f867c76788bce92d6b12e0d820028;hp=fa40574e505b8bee5b18844e96f422cce54e5f54;hb=93459582fd340e4f63efed0fab9abd49a2cb6373;hpb=3b7aee21b50f4bd0014878f29129ac33812faea3

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index fa40574e50..bd248748bc 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -123,7 +123,7 @@ int mips_m4k_examine_debug_reason(target_t *target)
 int mips_m4k_debug_entry(target_t *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	uint32_t debug_reg;
 
 	/* read debug register */
@@ -155,7 +155,7 @@ int mips_m4k_poll(target_t *target)
 {
 	int retval;
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
 
 	/* read ejtag control reg */
@@ -215,7 +215,7 @@ int mips_m4k_poll(target_t *target)
 int mips_m4k_halt(struct target_s *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
 	LOG_DEBUG("target->state: %s",
 		  target_state_name(target));
@@ -260,7 +260,7 @@ int mips_m4k_halt(struct target_s *target)
 int mips_m4k_assert_reset(target_t *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
 	LOG_DEBUG("target->state: %s",
 		target_state_name(target));
@@ -339,7 +339,7 @@ int mips_m4k_soft_reset_halt(struct target_s *target)
 int mips_m4k_single_step_core(target_t *target)
 {
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
 	/* configure single step mode */
 	mips_ejtag_config_step(ejtag_info, 1);
@@ -358,7 +358,7 @@ int mips_m4k_single_step_core(target_t *target)
 int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
 {
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	breakpoint_t *breakpoint = NULL;
 	uint32_t resume_pc;
 
@@ -430,7 +430,7 @@ int mips_m4k_step(struct target_s *target, int current, uint32_t address, int ha
 {
 	/* get pointers to arch-specific information */
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	breakpoint_t *breakpoint = NULL;
 
 	if (target->state != TARGET_HALTED)
@@ -846,7 +846,7 @@ void mips_m4k_enable_watchpoints(struct target_s *target)
 int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
 	LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
 
@@ -878,7 +878,7 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz
 int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
 {
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
 	LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
 
@@ -917,7 +917,7 @@ int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
 	return ERROR_OK;
 }
 
-int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, struct jtag_tap *tap)
+int mips_m4k_init_arch_info(target_t *target, struct mips_m4k_common *mips_m4k, struct jtag_tap *tap)
 {
 	struct mips32_common *mips32 = &mips_m4k->mips32_common;
 
@@ -932,7 +932,7 @@ int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, struc
 
 int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp)
 {
-	mips_m4k_common_t *mips_m4k = calloc(1,sizeof(mips_m4k_common_t));
+	struct mips_m4k_common *mips_m4k = calloc(1,sizeof(struct mips_m4k_common));
 
 	mips_m4k_init_arch_info(target, mips_m4k, target->tap);
 
@@ -943,7 +943,7 @@ int mips_m4k_examine(struct target_s *target)
 {
 	int retval;
 	struct mips32_common *mips32 = target->arch_info;
-	mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+	struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 	uint32_t idcode = 0;
 
 	if (!target_was_examined(target))