X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fmips_m4k.c;h=db69b95b162b2dd261c2705609b85f599de9eb32;hp=1cded6b4f668991c118a72ebb2d7231146b9f164;hb=727f178ab9d7cee04d883555aa57b917c3f2296c;hpb=9e02c99d7b2eba0988ab17a9af8b95b5fe065c5e diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index 1cded6b4f6..db69b95b16 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -20,9 +20,7 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + * along with this program. If not, see . * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -57,33 +55,37 @@ static int mips_m4k_examine_debug_reason(struct target *target) int retval; if ((target->debug_reason != DBG_REASON_DBGRQ) - && (target->debug_reason != DBG_REASON_SINGLESTEP)) { - /* get info about inst breakpoint support */ - retval = target_read_u32(target, - ejtag_info->ejtag_ibs_addr, &break_status); - if (retval != ERROR_OK) - return retval; - if (break_status & 0x1f) { - /* we have halted on a breakpoint */ - retval = target_write_u32(target, - ejtag_info->ejtag_ibs_addr, 0); + && (target->debug_reason != DBG_REASON_SINGLESTEP)) { + if (ejtag_info->debug_caps & EJTAG_DCR_IB) { + /* get info about inst breakpoint support */ + retval = target_read_u32(target, + ejtag_info->ejtag_ibs_addr, &break_status); if (retval != ERROR_OK) return retval; - target->debug_reason = DBG_REASON_BREAKPOINT; + if (break_status & 0x1f) { + /* we have halted on a breakpoint */ + retval = target_write_u32(target, + ejtag_info->ejtag_ibs_addr, 0); + if (retval != ERROR_OK) + return retval; + target->debug_reason = DBG_REASON_BREAKPOINT; + } } - /* get info about data breakpoint support */ - retval = target_read_u32(target, - ejtag_info->ejtag_dbs_addr, &break_status); - if (retval != ERROR_OK) - return retval; - if (break_status & 0x1f) { - /* we have halted on a breakpoint */ - retval = target_write_u32(target, - ejtag_info->ejtag_dbs_addr, 0); + if (ejtag_info->debug_caps & EJTAG_DCR_DB) { + /* get info about data breakpoint support */ + retval = target_read_u32(target, + ejtag_info->ejtag_dbs_addr, &break_status); if (retval != ERROR_OK) return retval; - target->debug_reason = DBG_REASON_WATCHPOINT; + if (break_status & 0x1f) { + /* we have halted on a breakpoint */ + retval = target_write_u32(target, + ejtag_info->ejtag_dbs_addr, 0); + if (retval != ERROR_OK) + return retval; + target->debug_reason = DBG_REASON_WATCHPOINT; + } } } @@ -147,7 +149,7 @@ static int mips_m4k_halt_smp(struct target *target) ret = mips_m4k_halt(curr); if (ret != ERROR_OK) { - LOG_ERROR("halt failed target->coreid: %d", curr->coreid); + LOG_ERROR("halt failed target->coreid: %" PRId32, curr->coreid); retval = ret; } head = head->next; @@ -298,6 +300,13 @@ static int mips_m4k_assert_reset(struct target *target) struct mips_m4k_common *mips_m4k = target_to_m4k(target); struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info; + /* TODO: apply hw reset signal in not examined state */ + if (!(target_was_examined(target))) { + LOG_WARNING("Reset is not asserted because the target is not examined."); + LOG_WARNING("Use a reset button or power cycle the target."); + return ERROR_TARGET_NOT_EXAMINED; + } + LOG_DEBUG("target->state: %s", target_state_name(target)); @@ -314,11 +323,15 @@ static int mips_m4k_assert_reset(struct target *target) srst_asserted = true; } - if (target->reset_halt) { - /* use hardware to catch reset */ - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT); - } else - mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT); + + /* EJTAG before v2.5/2.6 does not support EJTAGBOOT or NORMALBOOT */ + if (ejtag_info->ejtag_version != EJTAG_VERSION_20) { + if (target->reset_halt) { + /* use hardware to catch reset */ + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_EJTAGBOOT); + } else + mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT); + } if (jtag_reset_config & RESET_HAS_SRST) { /* here we should issue a srst only, but we may have to assert trst as well */ @@ -405,7 +418,7 @@ static int mips_m4k_restore_smp(struct target *target, uint32_t address, int han handle_breakpoints, 0); if (ret != ERROR_OK) { - LOG_ERROR("target->coreid :%d failed to resume at address :0x%x", + LOG_ERROR("target->coreid :%" PRId32 " failed to resume at address :0x%" PRIx32, curr->coreid, address); retval = ret; } @@ -602,7 +615,7 @@ static int mips_m4k_set_breakpoint(struct target *target, while (comparator_list[bp_num].used && (bp_num < mips32->num_inst_bpoints)) bp_num++; if (bp_num >= mips32->num_inst_bpoints) { - LOG_ERROR("Can not find free FP Comparator(bpid: %d)", + LOG_ERROR("Can not find free FP Comparator(bpid: %" PRIu32 ")", breakpoint->unique_id); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; } @@ -622,11 +635,11 @@ static int mips_m4k_set_breakpoint(struct target *target, ejtag_info->ejtag_ibm_offs, 0x00000000); target_write_u32(target, comparator_list[bp_num].reg_address + ejtag_info->ejtag_ibc_offs, 1); - LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx32 "", + LOG_DEBUG("bpid: %" PRIu32 ", bp_num %i bp_value 0x%" PRIx32 "", breakpoint->unique_id, bp_num, comparator_list[bp_num].bp_value); } else if (breakpoint->type == BKPT_SOFT) { - LOG_DEBUG("bpid: %d", breakpoint->unique_id); + LOG_DEBUG("bpid: %" PRIu32, breakpoint->unique_id); if (breakpoint->length == 4) { uint32_t verify = 0xffffffff; @@ -690,11 +703,11 @@ static int mips_m4k_unset_breakpoint(struct target *target, if (breakpoint->type == BKPT_HARD) { int bp_num = breakpoint->set - 1; if ((bp_num < 0) || (bp_num >= mips32->num_inst_bpoints)) { - LOG_DEBUG("Invalid FP Comparator number in breakpoint (bpid: %d)", + LOG_DEBUG("Invalid FP Comparator number in breakpoint (bpid: %" PRIu32 ")", breakpoint->unique_id); return ERROR_OK; } - LOG_DEBUG("bpid: %d - releasing hw: %d", + LOG_DEBUG("bpid: %" PRIu32 " - releasing hw: %d", breakpoint->unique_id, bp_num); comparator_list[bp_num].used = 0; @@ -704,7 +717,7 @@ static int mips_m4k_unset_breakpoint(struct target *target, } else { /* restore original instruction (kept in target endianness) */ - LOG_DEBUG("bpid: %d", breakpoint->unique_id); + LOG_DEBUG("bpid: %" PRIu32, breakpoint->unique_id); if (breakpoint->length == 4) { uint32_t current_instr; @@ -1048,9 +1061,9 @@ static int mips_m4k_write_memory(struct target *target, uint32_t address, /* if noDMA off, use DMAACC mode for memory write */ int retval; if (ejtag_info->impcode & EJTAG_IMP_NODMA) - retval = mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer); + retval = mips32_pracc_write_mem(ejtag_info, address, size, count, buffer); else - retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer); + retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, buffer); if (t != NULL) free(t); @@ -1131,6 +1144,7 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, { struct mips32_common *mips32 = target_to_mips32(target); struct mips_ejtag *ejtag_info = &mips32->ejtag_info; + struct working_area *fast_data_area; int retval; int write_t = 1; @@ -1157,6 +1171,17 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, ejtag_info->fast_access_save = -1; } + fast_data_area = mips32->fast_data_area; + + if (address <= fast_data_area->address + fast_data_area->size && + fast_data_area->address <= address + count) { + LOG_ERROR("fast_data (0x%8.8" PRIx32 ") is within write area " + "(0x%8.8" PRIx32 "-0x%8.8" PRIx32 ").", + fast_data_area->address, address, address + count); + LOG_ERROR("Change work-area-phys or load_image address!"); + return ERROR_FAIL; + } + /* mips32_pracc_fastdata_xfer requires uint32_t in host endianness, */ /* but byte array represents target endianness */ uint32_t *t = NULL; @@ -1296,7 +1321,7 @@ COMMAND_HANDLER(mips_m4k_handle_smp_gdb_command) target->gdb_service->core[1] = coreid; } - command_print(CMD_CTX, "gdb coreid %d -> %d", target->gdb_service->core[0] + command_print(CMD_CTX, "gdb coreid %" PRId32 " -> %" PRId32, target->gdb_service->core[0] , target->gdb_service->core[1]); } return ERROR_OK; @@ -1309,12 +1334,12 @@ COMMAND_HANDLER(mips_m4k_handle_scan_delay_command) struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info; if (CMD_ARGC == 1) - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], ejtag_info->scan_delay); + COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], ejtag_info->scan_delay); else if (CMD_ARGC > 1) return ERROR_COMMAND_SYNTAX_ERROR; command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay); - if (ejtag_info->scan_delay >= 20000000) { + if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) { ejtag_info->mode = 0; command_print(CMD_CTX, "running in legacy mode"); } else { @@ -1384,8 +1409,6 @@ struct target_type mips_m4k_target = { .poll = mips_m4k_poll, .arch_state = mips32_arch_state, - .target_request_data = NULL, - .halt = mips_m4k_halt, .resume = mips_m4k_resume, .step = mips_m4k_step,