X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fnds32_v3_common.c;h=271ffdd1cebdcc33dfa9bb700f337a420ac4d687;hp=e88430f2b93e69413ff969af0fbd170379c8933b;hb=0627e4686aa18159327751361940595e19b0c525;hpb=a8d0fec087b18d44a05124e48fa9f2ef111d3e8a diff --git a/src/target/nds32_v3_common.c b/src/target/nds32_v3_common.c index e88430f2b9..271ffdd1ce 100644 --- a/src/target/nds32_v3_common.c +++ b/src/target/nds32_v3_common.c @@ -13,9 +13,7 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + * along with this program. If not, see . * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -29,18 +27,6 @@ #include "nds32_aice.h" #include "nds32_v3_common.h" -static struct breakpoint syscall_breakpoint = { - 0x80, - 0, - 4, - BKPT_SOFT, - 0, - NULL, - NULL, - 0x515CA11, - 0, -}; - static struct nds32_v3_common_callback *v3_common_callback; static int nds32_v3_register_mapping(struct nds32 *nds32, int reg_no) @@ -90,17 +76,18 @@ static int nds32_v3_debug_entry(struct nds32 *nds32, bool enable_watchpoint) if (enable_watchpoint) CHECK_RETVAL(v3_common_callback->deactivate_hardware_watchpoint(nds32->target)); + struct breakpoint *syscall_break = &(nds32->syscall_break); if (nds32->virtual_hosting) { - if (syscall_breakpoint.set) { + if (syscall_break->set) { /** disable virtual hosting */ /* remove breakpoint at syscall entry */ - target_remove_breakpoint(nds32->target, &syscall_breakpoint); - syscall_breakpoint.set = 0; + target_remove_breakpoint(nds32->target, syscall_break); + syscall_break->set = 0; uint32_t value_pc; nds32_get_mapped_reg(nds32, PC, &value_pc); - if (value_pc == syscall_breakpoint.address) + if (value_pc == syscall_break->address) /** process syscall for virtual hosting */ nds32->hit_syscall = true; } @@ -218,10 +205,12 @@ static int nds32_v3_leave_debug_state(struct nds32 *nds32, bool enable_watchpoin } /* insert breakpoint at syscall entry */ - syscall_breakpoint.address = syscall_address; - syscall_breakpoint.type = BKPT_SOFT; - syscall_breakpoint.set = 1; - target_add_breakpoint(target, &syscall_breakpoint); + struct breakpoint *syscall_break = &(nds32->syscall_break); + + syscall_break->address = syscall_address; + syscall_break->type = BKPT_SOFT; + syscall_break->set = 1; + target_add_breakpoint(target, syscall_break); } return ERROR_OK; @@ -290,8 +279,8 @@ static int nds32_v3_get_exception_address(struct nds32 *nds32, nds32_read_opcode(nds32, val_pc, &opcode); nds32_evaluate_opcode(nds32, opcode, val_pc, &instruction); - LOG_DEBUG("PC: 0x%08x, access start: 0x%08x, end: 0x%08x", val_pc, - instruction.access_start, instruction.access_end); + LOG_DEBUG("PC: 0x%08" PRIx32 ", access start: 0x%08" PRIx32 ", end: 0x%08" PRIx32, + val_pc, instruction.access_start, instruction.access_end); /* check if multiple hits in the access range */ uint32_t in_range_watch_count = 0; @@ -378,14 +367,8 @@ int nds32_v3_target_request_data(struct target *target, return ERROR_OK; } -int nds32_v3_soft_reset_halt(struct target *target) -{ - struct aice_port_s *aice = target_to_aice(target); - return aice_assert_srst(aice, AICE_RESET_HOLD); -} - int nds32_v3_checksum_memory(struct target *target, - uint32_t address, uint32_t count, uint32_t *checksum) + target_addr_t address, uint32_t count, uint32_t *checksum) { LOG_WARNING("Not implemented: %s", __func__); @@ -451,8 +434,8 @@ int nds32_v3_run_algorithm(struct target *target, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, - uint32_t entry_point, - uint32_t exit_point, + target_addr_t entry_point, + target_addr_t exit_point, int timeout_ms, void *arch_info) { @@ -461,7 +444,7 @@ int nds32_v3_run_algorithm(struct target *target, return ERROR_FAIL; } -int nds32_v3_read_buffer(struct target *target, uint32_t address, +int nds32_v3_read_buffer(struct target *target, target_addr_t address, uint32_t size, uint8_t *buffer) { struct nds32 *nds32 = target_to_nds32(target); @@ -473,7 +456,7 @@ int nds32_v3_read_buffer(struct target *target, uint32_t address, return ERROR_TARGET_NOT_HALTED; } - uint32_t physical_address; + target_addr_t physical_address; /* BUG: If access range crosses multiple pages, the translation will not correct * for second page or so. */ @@ -519,7 +502,7 @@ int nds32_v3_read_buffer(struct target *target, uint32_t address, return result; } -int nds32_v3_write_buffer(struct target *target, uint32_t address, +int nds32_v3_write_buffer(struct target *target, target_addr_t address, uint32_t size, const uint8_t *buffer) { struct nds32 *nds32 = target_to_nds32(target); @@ -531,7 +514,7 @@ int nds32_v3_write_buffer(struct target *target, uint32_t address, return ERROR_TARGET_NOT_HALTED; } - uint32_t physical_address; + target_addr_t physical_address; /* BUG: If access range crosses multiple pages, the translation will not correct * for second page or so. */ @@ -555,19 +538,25 @@ int nds32_v3_write_buffer(struct target *target, uint32_t address, return ERROR_FAIL; if (nds32->hit_syscall) { - /* Use bus mode to access memory during virtual hosting */ struct aice_port_s *aice = target_to_aice(target); enum nds_memory_access origin_access_channel; - int result; - origin_access_channel = memory->access_channel; - memory->access_channel = NDS_MEMORY_ACC_BUS; - aice_memory_access(aice, NDS_MEMORY_ACC_BUS); + /* If target has no cache, use BUS mode to access memory. */ + if ((memory->dcache.line_size == 0) + || (memory->dcache.enable == false)) { + /* There is no Dcache or Dcache is disabled. */ + memory->access_channel = NDS_MEMORY_ACC_BUS; + aice_memory_access(aice, NDS_MEMORY_ACC_BUS); + } + + int result; result = nds32_gdb_fileio_write_memory(nds32, address, size, buffer); - memory->access_channel = origin_access_channel; - aice_memory_access(aice, origin_access_channel); + if (NDS_MEMORY_ACC_CPU == origin_access_channel) { + memory->access_channel = NDS_MEMORY_ACC_CPU; + aice_memory_access(aice, NDS_MEMORY_ACC_CPU); + } return result; } @@ -575,7 +564,7 @@ int nds32_v3_write_buffer(struct target *target, uint32_t address, return nds32_write_buffer(target, address, size, buffer); } -int nds32_v3_read_memory(struct target *target, uint32_t address, +int nds32_v3_read_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, uint8_t *buffer) { struct nds32 *nds32 = target_to_nds32(target); @@ -587,7 +576,7 @@ int nds32_v3_read_memory(struct target *target, uint32_t address, return ERROR_TARGET_NOT_HALTED; } - uint32_t physical_address; + target_addr_t physical_address; /* BUG: If access range crosses multiple pages, the translation will not correct * for second page or so. */ @@ -633,7 +622,7 @@ int nds32_v3_read_memory(struct target *target, uint32_t address, return result; } -int nds32_v3_write_memory(struct target *target, uint32_t address, +int nds32_v3_write_memory(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer) { struct nds32 *nds32 = target_to_nds32(target); @@ -645,7 +634,7 @@ int nds32_v3_write_memory(struct target *target, uint32_t address, return ERROR_TARGET_NOT_HALTED; } - uint32_t physical_address; + target_addr_t physical_address; /* BUG: If access range crosses multiple pages, the translation will not correct * for second page or so. */