X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fstm32_stlink.c;h=4044654cfe37c49b2d940d831889dd4234cde4b9;hp=f9daa014a0de3851093b19b4dec497c2e839169a;hb=d469c686d9c4aaef7dc0ff8376142b8fdd6d1dbd;hpb=6637cf9229c741f2a1e6a7d153895c33c1646e2d

diff --git a/src/target/stm32_stlink.c b/src/target/stm32_stlink.c
index f9daa014a0..4044654cfe 100644
--- a/src/target/stm32_stlink.c
+++ b/src/target/stm32_stlink.c
@@ -406,7 +406,7 @@ static int stm32_stlink_poll(struct target *target)
 
 static int stm32_stlink_assert_reset(struct target *target)
 {
-	int res;
+	int res = ERROR_OK;
 	struct stlink_interface_s *stlink_if = target_to_stlink(target);
 	struct armv7m_common *armv7m = target_to_armv7m(target);
 	bool use_srst_fallback = true;
@@ -415,12 +415,22 @@ static int stm32_stlink_assert_reset(struct target *target)
 
 	enum reset_types jtag_reset_config = jtag_get_reset_config();
 
+	bool srst_asserted = false;
+
+	if (jtag_reset_config & RESET_SRST_NO_GATING) {
+		jtag_add_reset(0, 1);
+		res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+		srst_asserted = true;
+	}
+
 	stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DHCSR, DBGKEY|C_DEBUGEN);
 	stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, VC_CORERESET);
 
 	if (jtag_reset_config & RESET_HAS_SRST) {
-		jtag_add_reset(0, 1);
-		res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+		if (!srst_asserted) {
+			jtag_add_reset(0, 1);
+			res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+		}
 		if (res == ERROR_COMMAND_NOTFOUND)
 			LOG_ERROR("Hardware srst not supported, falling back to software reset");
 		else if (res == ERROR_OK) {