X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fxscale.c;h=d776e2107d200cd730427737a40900b76f4f9a61;hp=096e4baf08fb47fa2757b7e0b5d3a6e503bddd72;hb=dfbb9f3e89ae;hpb=61ab13f895614dafa39c3891a4ae49fb24664e1c diff --git a/src/target/xscale.c b/src/target/xscale.c index 096e4baf08..d776e2107d 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -25,6 +25,7 @@ #include "xscale.h" +#include "arm7_9_common.h" #include "register.h" #include "target.h" #include "armv4_5.h" @@ -73,7 +74,6 @@ int xscale_write_core_reg(struct target_s *target, int num, enum armv4_5_mode mo int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int xscale_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer); int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer); -int xscale_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum); int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint); int xscale_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint); @@ -110,8 +110,9 @@ target_type_t xscale_target = .read_memory = xscale_read_memory, .write_memory = xscale_write_memory, .bulk_write_memory = xscale_bulk_write_memory, - .checksum_memory = xscale_checksum_memory, - + .checksum_memory = arm7_9_checksum_memory, + .blank_check_memory = arm7_9_blank_check_memory, + .run_algorithm = armv4_5_run_algorithm, .add_breakpoint = xscale_add_breakpoint, @@ -630,99 +631,52 @@ int xscale_send(target_t *target, u8 *buffer, int count, int size) int retval; int done_count = 0; - u8 output[4] = {0, 0, 0, 0}; - - scan_field_t fields[3]; - u8 field0_out = 0x0; - u8 field0_check_value = 0x2; - u8 field0_check_mask = 0x6; - u8 field2 = 0x1; - u8 field2_check_value = 0x0; - u8 field2_check_mask = 0x1; - + jtag_add_end_state(TAP_RTI); xscale_jtag_set_instr(xscale->jtag_info.chain_pos, xscale->jtag_info.dbgrx); - fields[0].device = xscale->jtag_info.chain_pos; - fields[0].num_bits = 3; - fields[0].out_value = &field0_out; - fields[0].out_mask = NULL; - fields[0].in_handler = NULL; - fields[0].in_value = NULL; - if (!xscale->fast_memory_access) - { - jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL); - } - - fields[1].device = xscale->jtag_info.chain_pos; - fields[1].num_bits = 32; - fields[1].out_value = output; - fields[1].out_mask = NULL; - fields[1].in_value = NULL; - fields[1].in_handler = NULL; - fields[1].in_handler_priv = NULL; - fields[1].in_check_value = NULL; - fields[1].in_check_mask = NULL; - - - - fields[2].device = xscale->jtag_info.chain_pos; - fields[2].num_bits = 1; - fields[2].out_value = &field2; - fields[2].out_mask = NULL; - fields[2].in_value = NULL; - fields[2].in_handler = NULL; - if (!xscale->fast_memory_access) + bits[0]=3; + t[0]=0; + bits[1]=32; + t[2]=1; + bits[2]=1; + int endianness = target->endianness; + while (done_count++ < count) { - jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL); - } - - if (size==4) - { - bits[0]=3; - t[0]=0; - bits[1]=32; - t[2]=1; - bits[2]=1; - int endianness = target->endianness; - while (done_count++ < count) + switch (size) { - switch (size) + case 4: + if (endianness == TARGET_LITTLE_ENDIAN) { - case 4: - if (endianness == TARGET_LITTLE_ENDIAN) - { - t[1]=le_to_h_u32(buffer); - } else - { - t[1]=be_to_h_u32(buffer); - } - break; - case 2: - if (endianness == TARGET_LITTLE_ENDIAN) - { - t[1]=le_to_h_u16(buffer); - } else - { - t[1]=be_to_h_u16(buffer); - } - break; - case 1: - t[1]=buffer[0]; - break; - default: - LOG_ERROR("BUG: size neither 4, 2 nor 1"); - exit(-1); + t[1]=le_to_h_u32(buffer); + } else + { + t[1]=be_to_h_u32(buffer); } - jtag_add_dr_out(xscale->jtag_info.chain_pos, - 3, - bits, - t, - TAP_RTI); - buffer += size; + break; + case 2: + if (endianness == TARGET_LITTLE_ENDIAN) + { + t[1]=le_to_h_u16(buffer); + } else + { + t[1]=be_to_h_u16(buffer); + } + break; + case 1: + t[1]=buffer[0]; + break; + default: + LOG_ERROR("BUG: size neither 4, 2 nor 1"); + exit(-1); } - + jtag_add_dr_out(xscale->jtag_info.chain_pos, + 3, + bits, + t, + TAP_RTI); + buffer += size; } if ((retval = jtag_execute_queue()) != ERROR_OK) @@ -1138,6 +1092,10 @@ int xscale_debug_entry(target_t *target) else armv4_5->core_state = ARMV4_5_STATE_ARM; + + if (armv4_5_mode_to_number(armv4_5->core_mode)==-1) + return ERROR_FAIL; + /* get banked registers, r8 to r14, and spsr if not in USR/SYS mode */ if ((armv4_5->core_mode != ARMV4_5_MODE_USR) && (armv4_5->core_mode != ARMV4_5_MODE_SYS)) { @@ -1741,7 +1699,7 @@ int xscale_deassert_reset(target_t *target) xscale_write_dcsr(target, 0, 1); target->state = TARGET_RUNNING; - if ((target->reset_mode != RESET_HALT) && (target->reset_mode != RESET_INIT)) + if (!target->reset_halt) { jtag_add_sleep(10000); @@ -2089,11 +2047,6 @@ int xscale_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe return xscale_write_memory(target, address, 4, count, buffer); } -int xscale_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum) -{ - return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; -} - u32 xscale_get_ttb(target_t *target) { armv4_5_common_t *armv4_5 = target->arch_info; @@ -3139,8 +3092,6 @@ int xscale_init_arch_info(target_t *target, xscale_common_t *xscale, int chain_p xscale->armv4_5_mmu.has_tiny_pages = 1; xscale->armv4_5_mmu.mmu_enabled = 0; - xscale->fast_memory_access = 0; - return ERROR_OK; } @@ -3739,41 +3690,6 @@ int xscale_handle_cp15(command_context_t *cmd_ctx, char *cmd, char **args, int a return ERROR_OK; } -int handle_xscale_fast_memory_access_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) -{ - target_t *target = get_current_target(cmd_ctx); - armv4_5_common_t *armv4_5; - xscale_common_t *xscale; - - if (xscale_get_arch_pointers(target, &armv4_5, &xscale) != ERROR_OK) - { - return ERROR_OK; - } - - if (argc == 1) - { - if (strcmp("enable", args[0]) == 0) - { - xscale->fast_memory_access = 1; - } - else if (strcmp("disable", args[0]) == 0) - { - xscale->fast_memory_access = 0; - } - else - { - return ERROR_COMMAND_SYNTAX_ERROR; - } - } else if (argc!=0) - { - return ERROR_COMMAND_SYNTAX_ERROR; - } - - command_print(cmd_ctx, "fast memory access is %s", (xscale->fast_memory_access) ? "enabled" : "disabled"); - - return ERROR_OK; -} - int xscale_register_commands(struct command_context_s *cmd_ctx) { command_t *xscale_cmd; @@ -3798,9 +3714,6 @@ int xscale_register_commands(struct command_context_s *cmd_ctx) COMMAND_EXEC, "load image from [base address]"); register_command(cmd_ctx, xscale_cmd, "cp15", xscale_handle_cp15, COMMAND_EXEC, "access coproc 15 [value]"); - register_command(cmd_ctx, xscale_cmd, "fast_memory_access", handle_xscale_fast_memory_access_command, - COMMAND_ANY, "use fast memory accesses instead of slower but potentially unsafe slow accesses "); - armv4_5_register_commands(cmd_ctx);