X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fxscale.h;h=f20074fdb9ec1ea77772db34350e23872d3617bf;hp=4f1b54d8b92403cd15e68aa907af24f03d0ba771;hb=4960c9018f2560b11ede91cde8a68dc56c690159;hpb=0f1163e823c6ca3c2a81fa296157f5dde0635fea

diff --git a/src/target/xscale.h b/src/target/xscale.h
index 4f1b54d8b9..f20074fdb9 100644
--- a/src/target/xscale.h
+++ b/src/target/xscale.h
@@ -23,7 +23,7 @@
 #ifndef XSCALE_H
 #define XSCALE_H
 
-#include "armv4_5.h"
+#include "arm.h"
 #include "armv4_5_mmu.h"
 #include "trace.h"
 
@@ -37,6 +37,10 @@
 #define XSCALE_LDIC	0x07
 #define XSCALE_SELDCSR	0x09
 
+/* Possible CPU types */
+#define	XSCALE_IXP4XX_PXA2XX	0x0
+#define	XSCALE_PXA3XX		0x4
+
 enum xscale_debug_reason
 {
 	XSCALE_DBG_REASON_GENERIC,
@@ -75,7 +79,7 @@ struct xscale_trace
 	int buffer_fill;				/* maximum number of trace runs to read (-1 for wrap-around) */
 	int pc_ok;
 	uint32_t current_pc;
-	armv4_5_state_t core_state;		/* current core state (ARM, Thumb, Jazelle) */
+	enum arm_state core_state;	/* current core state (ARM, Thumb) */
 };
 
 struct xscale_common
@@ -129,6 +133,9 @@ struct xscale_common
 	uint32_t cp15_control_reg;
 
 	int fast_memory_access;
+
+	/* CPU variant */
+	int xscale_variant;
 };
 
 static inline struct xscale_common *