X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=src%2Ftarget%2Fxscale.h;h=f20074fdb9ec1ea77772db34350e23872d3617bf;hp=edccb4694c25648ad794e67b5d333b3687246cd4;hb=ff5deeeeaa4f394931e3c5ccfb4cfd33beda0743;hpb=526fe3d83e118d87af34353a7140c02f3f1a3c19

diff --git a/src/target/xscale.h b/src/target/xscale.h
index edccb4694c..f20074fdb9 100644
--- a/src/target/xscale.h
+++ b/src/target/xscale.h
@@ -2,7 +2,7 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007,2008 Øyvind Harboe                                      *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
@@ -23,27 +23,23 @@
 #ifndef XSCALE_H
 #define XSCALE_H
 
-#include "target.h"
-#include "register.h"
-#include "armv4_5.h"
+#include "arm.h"
 #include "armv4_5_mmu.h"
 #include "trace.h"
-#include "image.h"
 
 #define	XSCALE_COMMON_MAGIC 0x58534341
 
-typedef struct xscale_jtag_s
-{
-	/* position in JTAG scan chain */
-	int chain_pos;
+/* These four JTAG instructions are architecturally defined.
+ * Lengths are core-specific; originally 5 bits, later 7.
+ */
+#define XSCALE_DBGRX	0x02
+#define XSCALE_DBGTX	0x10
+#define XSCALE_LDIC	0x07
+#define XSCALE_SELDCSR	0x09
 
-	/* IR length and instructions */	
-	int ir_length;
-	u32 dbgrx;
-	u32 dbgtx;
-	u32 ldic;
-	u32 dcsr;
-} xscale_jtag_t;
+/* Possible CPU types */
+#define	XSCALE_IXP4XX_PXA2XX	0x0
+#define	XSCALE_PXA3XX		0x4
 
 enum xscale_debug_reason
 {
@@ -58,103 +54,102 @@ enum xscale_trace_entry_type
 	XSCALE_TRACE_ADDRESS = 0x1,
 };
 
-typedef struct xscale_trace_entry_s
+struct xscale_trace_entry
 {
-	u8 data;
+	uint8_t data;
 	enum xscale_trace_entry_type type;
-} xscale_trace_entry_t;
+};
 
-typedef struct xscale_trace_data_s
+struct xscale_trace_data
 {
-	xscale_trace_entry_t *entries;
+	struct xscale_trace_entry *entries;
 	int depth;
-	u32 chkpt0;
-	u32 chkpt1;
-	u32 last_instruction;
-	struct xscale_trace_data_s *next;
-} xscale_trace_data_t;
+	uint32_t chkpt0;
+	uint32_t chkpt1;
+	uint32_t last_instruction;
+	struct xscale_trace_data *next;
+};
 
-typedef struct xscale_trace_s
+struct xscale_trace
 {
 	trace_status_t capture_status;	/* current state of capture run */
-	image_t *image;					/* source for target opcodes */
-	xscale_trace_data_t *data;		/* linked list of collected trace data */
+	struct image *image;					/* source for target opcodes */
+	struct xscale_trace_data *data;		/* linked list of collected trace data */
 	int buffer_enabled;				/* whether trace buffer is enabled */
 	int buffer_fill;				/* maximum number of trace runs to read (-1 for wrap-around) */
 	int pc_ok;
-	u32 current_pc;
-	armv4_5_state_t core_state;		/* current core state (ARM, Thumb, Jazelle) */
-} xscale_trace_t;
+	uint32_t current_pc;
+	enum arm_state core_state;	/* current core state (ARM, Thumb) */
+};
 
-typedef struct xscale_common_s
+struct xscale_common
 {
+	/* armv4/5 common stuff */
+	struct arm armv4_5_common;
+
 	int common_magic;
-	
-	/* XScale registers (CP15, DBG) */
-	reg_cache_t *reg_cache;
 
-	/* pxa250, pxa255, pxa27x, ixp42x, ... */
-	char *variant;
+	/* XScale registers (CP15, DBG) */
+	struct reg_cache *reg_cache;
 
-	xscale_jtag_t jtag_info;
-	
 	/* current state of the debug handler */
-	int handler_installed;
-	int handler_running;
-	u32 handler_address;
-	
+	uint32_t handler_address;
+
 	/* target-endian buffers with exception vectors */
-	u32 low_vectors[8];
-	u32 high_vectors[8];
-	
+	uint32_t low_vectors[8];
+	uint32_t high_vectors[8];
+
 	/* static low vectors */
-	u8 static_low_vectors_set;	/* bit field with static vectors set by the user */
-	u8 static_high_vectors_set; /* bit field with static vectors set by the user */
-	u32 static_low_vectors[8];
-	u32 static_high_vectors[8];
-
-	/* DCache cleaning */	
-	u32 cache_clean_address;
-	
+	uint8_t static_low_vectors_set;	/* bit field with static vectors set by the user */
+	uint8_t static_high_vectors_set; /* bit field with static vectors set by the user */
+	uint32_t static_low_vectors[8];
+	uint32_t static_high_vectors[8];
+
+	/* DCache cleaning */
+	uint32_t cache_clean_address;
+
 	/* whether hold_rst and ext_dbg_break should be set */
 	int hold_rst;
 	int external_debug_break;
-	
+
 	/* breakpoint / watchpoint handling */
-	int force_hw_bkpts;
 	int dbr_available;
 	int dbr0_used;
 	int dbr1_used;
 	int ibcr_available;
 	int ibcr0_used;
 	int	ibcr1_used;
-	u32 arm_bkpt;
-	u16 thumb_bkpt;
-	
-	u8 vector_catch;
+	uint32_t arm_bkpt;
+	uint16_t thumb_bkpt;
+
+	uint8_t vector_catch;
+
+	struct xscale_trace trace;
 
-	xscale_trace_t trace;
-	
 	int arch_debug_reason;
-	
-	/* armv4/5 common stuff */
-	armv4_5_common_t armv4_5_common;
-	
+
 	/* MMU/Caches */
-	armv4_5_mmu_common_t armv4_5_mmu;
-	u32 cp15_control_reg;
-	
-	/* possible future enhancements that go beyond XScale common stuff */
-	void *arch_info;
-	
+	struct armv4_5_mmu_common armv4_5_mmu;
+	uint32_t cp15_control_reg;
+
 	int fast_memory_access;
-} xscale_common_t;
 
-typedef struct xscale_reg_s
+	/* CPU variant */
+	int xscale_variant;
+};
+
+static inline struct xscale_common *
+target_to_xscale(struct target *target)
+{
+	return container_of(target->arch_info, struct xscale_common,
+			armv4_5_common);
+}
+
+struct xscale_reg
 {
 	int dbg_handler_number;
-	target_t *target;
-} xscale_reg_t;
+	struct target *target;
+};
 
 enum
 {