X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Fboard%2Fstm3220g_eval_stlink.cfg;h=b58e42fe5d85ed30490f51056330a74daa138c18;hp=6ac3751f1de054c5489b50e0a848bf6748f151de;hb=cb2f21bf3608f24de5c2e4219626cc464269e830;hpb=067ac78b61ebd90523f9750ec7bcd4b67263b435

diff --git a/tcl/board/stm3220g_eval_stlink.cfg b/tcl/board/stm3220g_eval_stlink.cfg
index 6ac3751f1d..b58e42fe5d 100644
--- a/tcl/board/stm3220g_eval_stlink.cfg
+++ b/tcl/board/stm3220g_eval_stlink.cfg
@@ -4,7 +4,9 @@
 #
 # This is for using the onboard STLINK/V2
 
-source [find interface/stlink-v2.cfg]
+source [find interface/stlink.cfg]
+
+transport select hla_swd
 
 # increase working area to 128KB
 set WORKAREASIZE 0x20000
@@ -12,4 +14,6 @@ set WORKAREASIZE 0x20000
 # chip name
 set CHIPNAME STM32F207IGH6
 
-source [find target/stm32f2x_stlink.cfg]
+source [find target/stm32f2x.cfg]
+
+reset_config srst_only