X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Fboard%2Ftelo.cfg;h=c4e5d67f48df2c84e987b6cc2b52094686455079;hp=d740db2ef767e3f0ecd7f0e0be0dc48603e285d3;hb=f86137066a6b42c46c457c9837a8015990bf71e6;hpb=b4acbee47fcb29afc9958b4a9e74b9916a415dec

diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index d740db2ef7..c4e5d67f48 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -8,26 +8,27 @@ source [find target/c100helper.tcl]
 
 
 # Telo board & C100 support trst and srst
-# however openocd does not support 
-# 1. setting srst reset pulse width
-# 2. setting delay between srst pulse and JTAG access
-# This really makes the srst useless for now.
+# Note that libftd2xx.so tries to assert srst
+# which break this script
+# use libftdi.so library instead with this script
+# make the reset asserted to
+# allow RC circuit to discharge for: [ms]
+jtag_nsrst_assert_width 100
+jtag_ntrst_assert_width 100
+# don't talk to JTAG after reset for: [ms]
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
 reset_config trst_and_srst separate
 
 
 
+
 # issue telnet: reset init
 # issue gdb: monitor reset init
 $_TARGETNAME configure -event reset-init {
 	jtag_khz 100
-	# setup GPIO used as control signals for C100
-	setupGPIO
-	# This will allow acces to lower 8MB or NOR
-	lowGPIO5 
-	# setup NOR size,timing,etc.
-	setupNOR
-	# setup internals + PLL + DDR2
-	initC100
+	# this will setup Telo board
+	setupTelo
 	#turn up the JTAG speed
 	jtag_khz 3000
 	puts "JTAG speek now 3MHz"
@@ -38,10 +39,15 @@ $_TARGETNAME configure -event reset-deassert-post {
 	# Force target into ARM state.
 #	soft_reset_halt # not implemented on ARM11
 	puts "Detected SRSRT asserted on C100.CPU"
-	
+
+}
+
+$_TARGETNAME configure -event reset-assert-post {
+  puts "Assering reset"
+  #sleep 10
 }
 
-proc power_restore {} { puts "Sensed power restore. No action." } 
+proc power_restore {} { puts "Sensed power restore. No action." }
 proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }