X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Far71xx.cfg;h=47bab1e34ce45649d890554e7ba121cd8107246a;hp=213048ae8f0a9da75c25a766aff2d03c9bd9cb98;hb=71af49ca7fb11b0bd0c1ba9578826f49288b68ef;hpb=86a7d813a165fda2816b8152342219b6c4ae2fc4;ds=sidebyside

diff --git a/tcl/target/ar71xx.cfg b/tcl/target/ar71xx.cfg
index 213048ae8f..47bab1e34c 100644
--- a/tcl/target/ar71xx.cfg
+++ b/tcl/target/ar71xx.cfg
@@ -29,11 +29,11 @@ $TARGETNAME configure -event reset-init {
 	mww 0xb8050000 0x800f00e8       # clr pwrdwn & bypass
 	mww 0xb8050008 1		# set clock_switch bit
 	sleep 1                         # wait for lock
-	
+
 	# Setup DDR config and flash mapping
 	mww 0xb8000000 0xefbc8cd0       # DDR cfg cdl val (rst: 0x5bfc8d0)
 	mww 0xb8000004 0x8e7156a2       # DDR cfg2 cdl val (rst: 0x80d106a8)
-	
+
 	mww 0xb8000010 8		# force precharge all banks
 	mww 0xb8000010 1 		# force EMRS update cycle
 	mww 0xb800000c 0                # clr ext. mode register
@@ -47,7 +47,7 @@ $TARGETNAME configure -event reset-init {
 	mww 0xb8000020 0
 	mww 0xb8000024 0
 	mww 0xb8000028 0
-}	
+}
 
 # setup working area somewhere in RAM
 $TARGETNAME configure -work-area-phys 0xa0600000 -work-area-size 0x20000