X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Ffm3.cfg;h=e2d78d1e5563b84e4090c54b7f87daa8864c2e0a;hp=e81fcc8948d7543aea222c1680c251fdfeabf1a6;hb=c7384117c66e8f18896ca09ab8095d6da16bb1e5;hpb=b7d2cdc0d4fc319169c60362708a67e2ff626525

diff --git a/tcl/target/fm3.cfg b/tcl/target/fm3.cfg
index e81fcc8948..e2d78d1e55 100644
--- a/tcl/target/fm3.cfg
+++ b/tcl/target/fm3.cfg
@@ -1,10 +1,12 @@
-# MB96F506
+# MB9BF506
 # Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM
 
+source [find target/swj-dp.tcl]
+
 if { [info exists CHIPNAME] } {
 	set _CHIPNAME $CHIPNAME
 } else {
-	set _CHIPNAME mb9bf500
+	set _CHIPNAME mb9bfxx6
 }
 
 if { [info exists ENDIAN] } {
@@ -21,12 +23,14 @@ if { [info exists CPUTAPID] } {
 
 # delays on reset lines
 adapter_nsrst_delay 100
-jtag_ntrst_delay 100
+if {[using_jtag]} {
+   jtag_ntrst_delay 100
+}
 
 # Fujitsu cortex-M3 reset configuration
 reset_config trst_only
 
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
@@ -42,6 +46,8 @@ flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
 # 4MHz / 6 = 666kHz, so use 500
 adapter_khz 500
 
-# if srst is not fitted use SYSRESETREQ to
-# perform a soft reset
-cortex_m reset_config sysresetreq
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to
+   # perform a soft reset
+   cortex_m reset_config sysresetreq
+}