X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fimx27.cfg;h=dabae6d70f8d621cc59dfb5d07e990f84eb7099a;hp=f12e8784e1aab65f18c51344fae5f429ca3b6240;hb=44d6a531f7ad07ec20962fe1c61bb7787f2c7cf5;hpb=ce89c7bf6588c7b2800c4ca453278b6f94795130 diff --git a/tcl/target/imx27.cfg b/tcl/target/imx27.cfg index f12e8784e1..dabae6d70f 100644 --- a/tcl/target/imx27.cfg +++ b/tcl/target/imx27.cfg @@ -6,28 +6,28 @@ # failing, etc. reset_config trst_and_srst srst_pulls_trst -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { set _CHIPNAME imx27 } -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { set _ENDIAN little } -# Note above there are 2 taps +# Note above there are 2 taps -# The bs tap -if { [info exists BSTAPID ] } { - set _BSTAPID $BSTAPID +# trace buffer +if { [info exists ETBTAPID ] } { + set _ETBTAPID $ETBTAPID } else { - set _BSTAPID 0x1b900f0f + set _ETBTAPID 0x1b900f0f } -jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID +jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID # The CPU tap if { [info exists CPUTAPID ] } { @@ -40,8 +40,14 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_C # Create the GDB Target. set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs -$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 -work-area-size 0x8000 -work-area-backup 1 +# REVISIT what operating environment sets up this virtual address mapping? +$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \ + -work-area-size 0x8000 -work-area-backup 1 # Internal to the chip, there is 45K of SRAM # arm7_9 dcc_downloads enable + +# trace setup +etm config $_TARGETNAME 16 normal full etb +etb config $_TARGETNAME $_CHIPNAME.etb