X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fimx27.cfg;h=e5a5035d4fd7ea698ade06b7a7a3d7d809a529a2;hp=837ea6146ac7025ef6825afdb7a47f9c2bde4281;hb=a0a504569b5ae4d6e485414c43be0fd4bb216bab;hpb=71af49ca7fb11b0bd0c1ba9578826f49288b68ef diff --git a/tcl/target/imx27.cfg b/tcl/target/imx27.cfg index 837ea6146a..e5a5035d4f 100644 --- a/tcl/target/imx27.cfg +++ b/tcl/target/imx27.cfg @@ -7,41 +7,47 @@ reset_config trst_and_srst srst_pulls_trst if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME + set _CHIPNAME $CHIPNAME } else { - set _CHIPNAME imx27 + set _CHIPNAME imx27 } if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN + set _ENDIAN $ENDIAN } else { - set _ENDIAN little + set _ENDIAN little } # Note above there are 2 taps -# The bs tap -if { [info exists BSTAPID ] } { - set _BSTAPID $BSTAPID +# trace buffer +if { [info exists ETBTAPID] } { + set _ETBTAPID $ETBTAPID } else { - set _BSTAPID 0x1b900f0f + set _ETBTAPID 0x1b900f0f } -jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID +jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID # The CPU tap -if { [info exists CPUTAPID ] } { +if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x07926121 } -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID # Create the GDB Target. set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs -$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 -work-area-size 0x8000 -work-area-backup 1 +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME +# REVISIT what operating environment sets up this virtual address mapping? +$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \ + -work-area-size 0x8000 -work-area-backup 1 # Internal to the chip, there is 45K of SRAM # arm7_9 dcc_downloads enable + +# trace setup +etm config $_TARGETNAME 16 normal full etb +etb config $_TARGETNAME $_CHIPNAME.etb