X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fimx35.cfg;h=21495c23ccfa7e7fba28f46206e2a5a8b2f853bc;hp=d254c603b1346724d162095dbdc3cd622c85c2d0;hb=79d6d3cda90c6694343bde909978069994049ab7;hpb=dbbc9c41f7db210b0a4e226540a28e0a8a5019bf

diff --git a/tcl/target/imx35.cfg b/tcl/target/imx35.cfg
index d254c603b1..21495c23cc 100644
--- a/tcl/target/imx35.cfg
+++ b/tcl/target/imx35.cfg
@@ -1,41 +1,42 @@
 # imx35 config
 #
 
-if { [info exists CHIPNAME] } {	
-   set  _CHIPNAME $CHIPNAME    
-} else {	 
-   set  _CHIPNAME imx35
+reset_config trst_and_srst srst_gates_jtag
+jtag_ntrst_delay 100
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME imx35
 }
 
-if { [info exists ENDIAN] } {	
-   set  _ENDIAN $ENDIAN    
-} else {	 
-   set  _ENDIAN little
+if { [info exists ENDIAN] } {
+   set _ENDIAN $ENDIAN
+} else {
+   set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
    set _CPUTAPID 0x07b3601d
 }
 
-if { [info exists SDMATAPID ] } {
+if { [info exists SDMATAPID] } {
    set _SDMATAPID $SDMATAPID
 } else {
    set _SDMATAPID 0x0882601d
 }
 
-#========================================
-# The "system jtag controller" 
-# IMX31 reference manual, page 6-28 - figure 6-14
-if { [info exists SJCTAPID ] } {
-   set _SJCTAPID $SJCTAPID
+if { [info exists ETBTAPID] } {
+   set _ETBTAPID $ETBTAPID
 } else {
-   set _SJCTAPID 0x2b900f0f
+   set _ETBTAPID 0x2b900f0f
 }
 
-jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0 -expected-id $_SJCTAPID
+#========================================
 
+jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
 
 # No IDCODE for this TAP
@@ -43,8 +44,12 @@ jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0x0 -expected
 
 jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
 
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
 
-proc power_restore {} { puts "Sensed power restore. No action." } 
-proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
+proc power_restore {} { echo "Sensed power restore. No action." }
+proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." }
+
+# trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
+etm config $_TARGETNAME 16 normal full etb
+etb config $_TARGETNAME $_CHIPNAME.etb