X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fomapl138.cfg;h=fd9ff4c2e7d061ab5257b24662b9120b3be3fb6e;hp=9a10d530cb8a8ef7bed7a9798f4072fb6f0fa0b3;hb=b171c7ab16e1cbad3ca2a6a2cb0a26a3da735424;hpb=39cff815d2684e2d42361af768cd5b5e73ad49e2

diff --git a/tcl/target/omapl138.cfg b/tcl/target/omapl138.cfg
index 9a10d530cb..fd9ff4c2e7 100644
--- a/tcl/target/omapl138.cfg
+++ b/tcl/target/omapl138.cfg
@@ -52,8 +52,8 @@ $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x2000
 # be absolutely certain the JTAG clock will work with the worst-case
 # CLKIN = 20 MHz (best case: 30 MHz) even when no bootloader turns
 # on the PLL and starts using it.  OK to speed up after clock setup.
-jtag_rclk 1500
-$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+adapter_khz 1500
+$_TARGETNAME configure -event "reset-start" { adapter_khz 1500 }
 
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable