X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fomapl138.cfg;h=fd9ff4c2e7d061ab5257b24662b9120b3be3fb6e;hp=d3e472c6d8c5519eaf7b0b66345c71d22804052c;hb=b171c7ab16e1cbad3ca2a6a2cb0a26a3da735424;hpb=ca45e700b1c57caca2ef08e665e3c7e3e02ac8d3

diff --git a/tcl/target/omapl138.cfg b/tcl/target/omapl138.cfg
index d3e472c6d8..fd9ff4c2e7 100644
--- a/tcl/target/omapl138.cfg
+++ b/tcl/target/omapl138.cfg
@@ -35,7 +35,7 @@ if { [info exists JRC_TAPID] } {
 } else {
    set _JRC_TAPID 0x0b7d102f
 }
-jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID
+jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
 
 jtag configure $_CHIPNAME.jrc -event setup \
 	"jtag tapenable $_CHIPNAME.etb; jtag tapenable $_CHIPNAME.arm"
@@ -52,8 +52,8 @@ $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x2000
 # be absolutely certain the JTAG clock will work with the worst-case
 # CLKIN = 20 MHz (best case: 30 MHz) even when no bootloader turns
 # on the PLL and starts using it.  OK to speed up after clock setup.
-jtag_rclk 1500
-$_TARGETNAME configure -event "reset-start" { jtag_rclk 1500 }
+adapter_khz 1500
+$_TARGETNAME configure -event "reset-start" { adapter_khz 1500 }
 
 arm7_9 fast_memory_access enable
 arm7_9 dcc_downloads enable