X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2For1k.cfg;h=360a0ddf3d80c5f3f4e9e007014a1c084cec769c;hp=84514ef0faffc12bee84a36c2919dd37018c2e0a;hb=fffe8e672572da46046b12a5d6b037057059393e;hpb=4e79b48e2c7e535ef21178a69788c15b571c72ff

diff --git a/tcl/target/or1k.cfg b/tcl/target/or1k.cfg
index 84514ef0fa..360a0ddf3d 100644
--- a/tcl/target/or1k.cfg
+++ b/tcl/target/or1k.cfg
@@ -29,6 +29,23 @@ if { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
 
 	# Select the TAP core we are using
 	tap_select vjtag
+
+} elseif { [string compare $_TAP_TYPE "XILINX_BSCAN"] == 0 } {
+
+	if { [info exists FPGATAPID] } {
+	   set _FPGATAPID $FPGATAPID
+	} else {
+	   puts "You need to set your FPGA JTAG ID"
+		shutdown
+	}
+
+	jtag newtap $_CHIPNAME cpu -irlen 6 -expected-id $_FPGATAPID
+
+	set _TARGETNAME $_CHIPNAME.cpu
+	target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
+
+	# Select the TAP core we are using
+	tap_select xilinx_bscan
 } else {
 	# OpenCores Mohor JTAG TAP ID
 	set _CPUTAPID  0x14951185
@@ -44,10 +61,12 @@ if { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
 
 # Select the debug unit core we are using. This debug unit as an option.
 
-proc ADBG_USE_HISPEED {}	{ return 1 }
+set ADBG_USE_HISPEED		1
+set ENABLE_JSP_SERVER		2
+set ENABLE_JSP_MULTI		4
 
 # If ADBG_USE_HISPEED is set (options bit 1), status bits will be skipped
 # on burst reads and writes to improve download speeds.
 # This option must match the RTL configured option.
 
-du_select adv [ADBG_USE_HISPEED]
+du_select adv [expr $ADBG_USE_HISPEED | $ENABLE_JSP_SERVER | $ENABLE_JSP_MULTI]