X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fsmp8634.cfg;h=5207a4438da26d3281adba849157db7b2b20c7aa;hp=dc9bf0bdc134b2578a9e998046fe6991ed6323b4;hb=ba66b4c594e12e4b1dd37168376ded95a8ae4e89;hpb=abfd4b19a6b1c1e257aed343af5ab71709f41bcb

diff --git a/tcl/target/smp8634.cfg b/tcl/target/smp8634.cfg
index dc9bf0bdc1..5207a4438d 100644
--- a/tcl/target/smp8634.cfg
+++ b/tcl/target/smp8634.cfg
@@ -1,18 +1,18 @@
 # script for Sigma Designs SMP8634 (eventually even SMP8635)
 
 if { [info exists CHIPNAME] } {
-   set  _CHIPNAME $CHIPNAME
+   set _CHIPNAME $CHIPNAME
 } else {
-   set  _CHIPNAME smp8634
+   set _CHIPNAME smp8634
 }
 
 if { [info exists ENDIAN] } {
-   set  _ENDIAN $ENDIAN
+   set _ENDIAN $ENDIAN
 } else {
-   set  _ENDIAN little
+   set _ENDIAN little
 }
 
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
 } else {
    set _CPUTAPID 0x08630001
@@ -25,7 +25,7 @@ reset_config trst_and_srst separate
 
 # jtag scan chain
 # format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag newtap $_CHIPNAME cpu -irlen 5  -ircapture 0x1 -irmask 0x1
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1
 
 set _TARGETNAME $_CHIPNAME.cpu
 target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant