X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fstellaris.cfg;h=4865e2916f602052aaa976e474e4930aacd5342d;hp=4fe99394aa83191e1b3c4e056a88a6a5a7b3b40e;hb=HEAD;hpb=064dc5daaccec5ba569d46aee0e9291352300d8b

diff --git a/tcl/target/stellaris.cfg b/tcl/target/stellaris.cfg
index 4fe99394aa..3cd91eb372 100644
--- a/tcl/target/stellaris.cfg
+++ b/tcl/target/stellaris.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
 # TI/Luminary Stellaris LM3S chip family
 
 # Some devices have errata in returning their device class.
@@ -42,7 +44,8 @@ if { [info exists CPUTAPID] } {
 # ... even though SWD ignores all except TAPID, and
 # JTAG shouldn't need anything more then irlen. (and TAPID).
 swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf \
- 	-expected-id $_CPUTAPID -ignore-version
+    -expected-id $_CPUTAPID -ignore-version
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
 
 if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE $WORKAREASIZE
@@ -52,7 +55,7 @@ if { [info exists WORKAREASIZE] } {
 }
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
 
 # 8K working area at base of ram, not backed up
 #
@@ -67,7 +70,7 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 # NOTE: this may be increased by a reset-init handler, after it
 # configures and enables the PLL.  Or you might need to decrease
 # this, if you're using a slower clock.
-adapter_khz 500
+adapter speed 500
 
 source [find mem_helper.tcl]
 
@@ -82,7 +85,7 @@ proc reset_peripherals {family} {
 	mmw $SYSCTL_RCC2 $SYSCTL_RCC2_BYPASS2 0
 
 	# RCC and RCC2 to their reset values
-	mww $SYSCTL_RCC [expr (0x078e3ad0 | ([mrw $SYSCTL_RCC] & $SYSCTL_RCC_MOSCDIS))]
+	mww $SYSCTL_RCC [expr {0x078e3ad0 | ([mrw $SYSCTL_RCC] & $SYSCTL_RCC_MOSCDIS)}]
 	mww $SYSCTL_RCC2 0x07806810
 	mww $SYSCTL_RCC 0x078e3ad1
 
@@ -120,8 +123,8 @@ proc reset_peripherals {family} {
 	mww $SYSCTL_MISC 0xffffffff
 
 	# Wait for any pending flash operations to complete
-	while {[expr [mrw $FLASH_FMC] & 0xffff] != 0} { sleep 1 }
-	while {[expr [mrw $FLASH_FMC2] & 0xffff] != 0} { sleep 1 }
+	while {[expr {[mrw $FLASH_FMC] & 0xffff}] != 0} { sleep 1 }
+	while {[expr {[mrw $FLASH_FMC2] & 0xffff}] != 0} { sleep 1 }
 
 	# Reset the flash controller registers
 	mww $FLASH_FMA 0
@@ -131,7 +134,7 @@ proc reset_peripherals {family} {
 }
 
 $_TARGETNAME configure -event reset-start {
-	adapter_khz 500
+	adapter speed 500
 
 	#
 	# When nRST is asserted on most Stellaris devices, it clears some of
@@ -151,7 +154,7 @@ $_TARGETNAME configure -event reset-start {
 	if {$_DEVICECLASS != 0xff} {
 	   set device_class $_DEVICECLASS
 	} else {
-	   set device_class [expr (([mrw 0x400fe000] >> 16) & 0xff)]
+	   set device_class [expr {([mrw 0x400fe000] >> 16) & 0xff}]
 	}
 
 	if {$device_class == 0 || $device_class == 1 ||
@@ -163,7 +166,7 @@ $_TARGETNAME configure -event reset-start {
 	} else {
 		if {![using_hla]} {
 		   # Tempest and Firestorm default to using NVIC VECTRESET
-		   # peripherals will need reseting manually, see proc reset_peripherals
+		   # peripherals will need resetting manually, see proc reset_peripherals
 		   cortex_m reset_config vectreset
 		}
 		# reset peripherals, based on code in