X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32l0.cfg;h=245213b425af400fc21d6f395a16caccc3c690aa;hp=45b3c364cff98a49191c128f05a28042b867e221;hb=a0a504569b5ae4d6e485414c43be0fd4bb216bab;hpb=1663a17d9d5f5988a8d129a6da36ebcf728d79a2

diff --git a/tcl/target/stm32l0.cfg b/tcl/target/stm32l0.cfg
index 45b3c364cf..245213b425 100644
--- a/tcl/target/stm32l0.cfg
+++ b/tcl/target/stm32l0.cfg
@@ -4,6 +4,7 @@
 #
 
 source [find target/swj-dp.tcl]
+source [find mem_helper.tcl]
 
 if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
@@ -46,6 +47,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset
@@ -73,3 +76,12 @@ $_TARGETNAME configure -event reset-init {
 $_TARGETNAME configure -event reset-start {
 	adapter_khz 300
 }
+
+$_TARGETNAME configure -event examine-end {
+	# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
+	mmw 0x40015804 0x00000007 0
+
+	# Stop watchdog counters during halt
+	# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
+	mmw 0x40015808 0x00001800 0
+}