X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fstm32l0.cfg;h=fd8f951bd3fc280390ec1342b1362a011a8d4b1d;hp=fc2751e9585081dd54e8d5179561962b96861712;hb=c32f81f7186ac825652df4226646b3505b01f940;hpb=c3ec1940b52e5d3f47c5c96bea2430b4444d83ea

diff --git a/tcl/target/stm32l0.cfg b/tcl/target/stm32l0.cfg
index fc2751e958..fd8f951bd3 100644
--- a/tcl/target/stm32l0.cfg
+++ b/tcl/target/stm32l0.cfg
@@ -11,6 +11,8 @@ if { [info exists CHIPNAME] } {
    set _CHIPNAME stm32l0
 }
 
+set _ENDIAN little
+
 # Work-area is a space in RAM used for flash programming
 # By default use 8kB (max ram on smallest part)
 if { [info exists WORKAREASIZE] } {
@@ -36,7 +38,7 @@ if { [info exists CPUTAPID] } {
 swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
+target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
 
@@ -44,6 +46,8 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
 
+reset_config srst_nogate
+
 if {![using_hla]} {
    # if srst is not fitted use SYSRESETREQ to
    # perform a soft reset