X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fu8500.cfg;h=66fc075c222e7f1278526ae4e318c2c627899071;hp=f6e2091fa5a4e7f7f3c55336b956db34096f0b93;hb=c32f81f7186ac825652df4226646b3505b01f940;hpb=d2911627d236ecf3d4ee537fb4e3f17de77a60bb diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg index f6e2091fa5..66fc075c22 100644 --- a/tcl/target/u8500.cfg +++ b/tcl/target/u8500.cfg @@ -15,27 +15,27 @@ proc mmu_on {} { } proc ocd_gdb_restart {target_id} { - global _TARGETNAME_1 + global _TARGETNAME_1 global _SMP targets $_TARGETNAME_1 if { [expr ($_SMP == 1)] } { - cortex_a8 smp_off + cortex_a smp_off } rst_run halt if { [expr ($_SMP == 1)]} { - cortex_a8 smp_on + cortex_a smp_on } } proc smp_reg {} { - global _TARGETNAME_1 - global _TARGETNAME_2 + global _TARGETNAME_1 + global _TARGETNAME_2 targets $_TARGETNAME_1 echo "$_TARGETNAME_1" set pc1 [reg pc] set stck1 [reg sp_svc] - targets $_TARGETNAME_2 + targets $_TARGETNAME_2 echo "$_TARGETNAME_1" set pc2 [reg pc] set stck2 [reg sp_svc] @@ -79,13 +79,13 @@ proc poll_pwrsts { } { set result 1 set i 0 irscan $_CHIPNAME.jrc 0x3a - drscan $_CHIPNAME.jrc 4 0 - set pwrsts [drscan $_CHIPNAME.jrc 16 0] + drscan $_CHIPNAME.jrc 4 0 + set pwrsts [drscan $_CHIPNAME.jrc 16 0] set pwrsts [expr (0x$pwrsts & 0xc)] while {[string equal "4" $pwrsts] && $i<20} { irscan $_CHIPNAME.jrc 0x3a - drscan $_CHIPNAME.jrc 4 0; - set pwrsts [drscan $_CHIPNAME.jrc 16 0] + drscan $_CHIPNAME.jrc 4 0; + set pwrsts [drscan $_CHIPNAME.jrc 16 0] set pwrsts [expr (0x$pwrsts & 0xc)] if {![string equal "4" $pwrsts]} { set result 1 @@ -100,7 +100,7 @@ proc poll_pwrsts { } { } proc halt_ { } { - if {[poll_pwrsts]==1} { + if {[poll_pwrsts]==1} { halt } else { echo "halt failed : target in retention" @@ -117,12 +117,12 @@ proc u8500_tapdisable {chip val} { proc enable_apetap {} { - global _CHIPNAME - global _TARGETNAME_2 + global _CHIPNAME + global _TARGETNAME_2 global _TARGETNAME_1 poll off irscan $_CHIPNAME.jrc 0x3e - drscan $_CHIPNAME.jrc 8 0xcf + drscan $_CHIPNAME.jrc 8 0xcf jtag tapenable $_CHIPNAME.dap irscan $_CHIPNAME.jrc 0x6 drscan $_CHIPNAME.jrc 32 0 @@ -131,7 +131,9 @@ proc enable_apetap {} { set status [$_TARGETNAME_1 curstate] if {[string equal "unknown" $status]} { $_TARGETNAME_1 arp_examine + cache_config l2x 0xa0412000 8 } + set status [$_TARGETNAME_2 curstate] if {[string equal "unknown" $status]} { $_TARGETNAME_2 arp_examine @@ -141,26 +143,26 @@ proc enable_apetap {} { tcl_port 5555 telnet_port 4444 gdb_port 3333 - + if { [info exists CHIPNAME] } { -global _CHIPNAME - set _CHIPNAME $CHIPNAME +global _CHIPNAME + set _CHIPNAME $CHIPNAME } else { -global _CHIPNAME - set _CHIPNAME u8500 +global _CHIPNAME + set _CHIPNAME u8500 } -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { # this defaults to a bigendian - set _ENDIAN little + set _ENDIAN little } # Subsidiary TAP: APE with scan chains for ARM Debug, EmbeddedICE-RT, -if { [info exists CPUTAPID ] } { +if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x4ba00477 @@ -173,7 +175,7 @@ jtag configure $_CHIPNAME.dap -event tap-disable \ #CLTAPC TAP JRC equivalent -if { [info exists CLTAPC_ID ] } { +if { [info exists CLTAPC_ID] } { set _CLTAPC_ID $CLTAPC_ID } else { set _CLTAPC_ID 0x22286041 @@ -181,41 +183,41 @@ if { [info exists CLTAPC_ID ] } { jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x6 -irmask 0xf -expected-id $_CLTAPC_ID -ignore-version -if { ![info exists TARGETNAME_1 ] } { -global _TARGETNAME_1 +if { ![info exists TARGETNAME_1] } { +global _TARGETNAME_1 set _TARGETNAME_1 $_CHIPNAME.cpu1 } else { -global _TARGETNAME_1 +global _TARGETNAME_1 set _TARGETNAME_1 $TARGETNAME_1 } -if { [info exists DAP_DBG1] } { +if { [info exists DAP_DBG1] } { set _DAP_DBG1 $DAP_DBG1 } else { set _DAP_DBG1 0x801A8000 } -if { [info exists DAP_DBG2] } { +if { [info exists DAP_DBG2] } { set _DAP_DBG2 $DAP_DBG2 } else { set _DAP_DBG2 0x801AA000 } -target create $_TARGETNAME_1 cortex_a8 -chain-position $_CHIPNAME.dap -dbgbase $_DAP_DBG1 -coreid 0 +target create $_TARGETNAME_1 cortex_a -chain-position $_CHIPNAME.dap -dbgbase $_DAP_DBG1 -coreid 0 -rtos linux $_TARGETNAME_1 configure -event gdb-attach { halt } -if { ![info exists TARGETNAME_2 ] } { -global _TARGETNAME_2 +if { ![info exists TARGETNAME_2] } { +global _TARGETNAME_2 set _TARGETNAME_2 $_CHIPNAME.cpu2 } else { -global _TARGETNAME_2 +global _TARGETNAME_2 set _TARGETNAME_2 $TARGETNAME_2 } -target create $_TARGETNAME_2 cortex_a8 -chain-position $_CHIPNAME.dap -dbgbase $_DAP_DBG2 -coreid 1 +target create $_TARGETNAME_2 cortex_a -chain-position $_CHIPNAME.dap -dbgbase $_DAP_DBG2 -coreid 1 -rtos linux $_TARGETNAME_2 configure -event gdb-attach { halt @@ -234,6 +236,9 @@ if { $_SMP == 1} { target smp $_CHIPNAME.cpu2 $_CHIPNAME.cpu1 } + + + proc secsts1 { } { global _CHIPNAME irscan $_CHIPNAME.jrc 0x3a @@ -265,6 +270,7 @@ proc att { } { } else { echo "target secured" } + }