X-Git-Url: https://review.openocd.org/gitweb?p=openocd.git;a=blobdiff_plain;f=tcl%2Ftarget%2Fxilinx_zynqmp.cfg;fp=tcl%2Ftarget%2Fxilinx_ultrascale.cfg;h=9be781cd8f72e9dd0caad666a55df3d46c93fed0;hp=9056c976ef3891057cdce88b6ebdee069c3b47cb;hb=d2fb461621dc97a611e7bb44a2a64e1efe300875;hpb=45b4998e9369029d48c1f33fbccb1a525793cd46 diff --git a/tcl/target/xilinx_ultrascale.cfg b/tcl/target/xilinx_zynqmp.cfg similarity index 75% rename from tcl/target/xilinx_ultrascale.cfg rename to tcl/target/xilinx_zynqmp.cfg index 9056c976ef..9be781cd8f 100644 --- a/tcl/target/xilinx_ultrascale.cfg +++ b/tcl/target/xilinx_zynqmp.cfg @@ -1,6 +1,6 @@ # # target configuration for -# Xilinx UltraScale+ +# Xilinx ZynqMP (UltraScale+ / A53) # if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME @@ -9,7 +9,7 @@ if { [info exists CHIPNAME] } { } # -# DAP tap +# DAP tap (Quard core A53) # if { [info exists DAP_TAPID] } { set _DAP_TAPID $DAP_TAPID @@ -21,18 +21,29 @@ jtag newtap $_CHIPNAME tap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DA dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap # -# PS tap +# PS tap (UltraScale+) # if { [info exists PS_TAPID] } { set _PS_TAPID $PS_TAPID + jtag newtap $_CHIPNAME ps -irlen 12 -ircapture 0x1 -irmask 0x03 -expected-id $_PS_TAPID } else { - set _PS_TAPID 0x04710093 + # FPGA Programmable logic. Values take from Table 39-1 in UG1085: + jtag newtap $_CHIPNAME ps -irlen 12 -ircapture 0x1 -irmask 0x03 -ignore-version \ + -expected-id 0x04711093 \ + -expected-id 0x04710093 \ + -expected-id 0x04721093 \ + -expected-id 0x04720093 \ + -expected-id 0x04739093 \ + -expected-id 0x04730093 \ + -expected-id 0x04738093 \ + -expected-id 0x04740093 \ + -expected-id 0x04750093 \ + -expected-id 0x04759093 \ + -expected-id 0x04758093 } set jtag_configured 0 -jtag newtap $_CHIPNAME ps -irlen 12 -ircapture 0x1 -irmask 0x03 -expected-id $_PS_TAPID - jtag configure $_CHIPNAME.ps -event setup { global _CHIPNAME global jtag_configured