Code Review / openocd.git / commit
? search:
summary | shortlog | log | commit | commitdiff | review | tree
(parent: 1bc4182) | patch
arm_opcode: Add support for ARM MCRR/MRRC 28/5228/8
authorFlorian Fainelli <f.fainelli@gmail.com>
Mon, 18 Mar 2019 23:00:07 +0000 (16:00 -0700)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sat, 14 Oct 2023 11:55:42 +0000 (11:55 +0000)
commitd27a3a00b8582cf2750cbc86c6194f5796ccca06
tree19d76b253b5a82b515c72f26dd709fa301c45d05tree | snapshot
parent1bc4182cebcbdf93d68d9759f4b4579ea4df7887commit | diff
arm_opcode: Add support for ARM MCRR/MRRC

Add support for the ARM MCRR/MRRC instructions which require the use of
two registers to transfer a 64-bit co-processor registers. We are going
to use this in a subsequent patch in order to properly dump 64-bit page
table descriptors that exist on ARMv7A with VMSA extensions.

We make use of r0 and r1 to transfer 64-bit quantities to/from DCC.

Change-Id: Ic4975026c1ae4f2853795575ac7701d541248736
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Michael Chalfant <michael.chalfant@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/target/arm.h diff | blob | history
src/target/arm_dpm.c diff | blob | history
src/target/arm_dpm.h diff | blob | history
src/target/arm_opcodes.h diff | blob | history
src/target/armv4_5.c diff | blob | history
src/target/cortex_a.c diff | blob | history
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)