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(parent: 4301ad8) | patch
target/arm_adi_v5: sync CSW and TAR cache on apreg write 65/4565/3
authorAntonio Borneo <borneo.antonio@gmail.com>
Fri, 15 Jun 2018 14:30:41 +0000 (16:30 +0200)
committerTomas Vanek <vanekt@fbl.cz>
Fri, 22 Jun 2018 08:24:37 +0000 (09:24 +0100)
commit0057c71ab6b81d0679b232318fc5f84b4becc471
tree2f19179b9361610fed7a6511d496c5ffefff9703tree | snapshot
parent4301ad83dbbd1065ff039c7a495118db53280190commit | diff
target/arm_adi_v5: sync CSW and TAR cache on apreg write

When using apreg to change AP registers CSW or TAR we get internal
cached value not valid anymore.

Reuse the setup functions for CSW and TAR to write them.
Invalidate the cached value before the call to force the write, thus
keeping original apreg behaviour.

Change-Id: Ib14fafd5e584345de94f2e983de55406c588ac1c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4565
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
src/target/arm_adi_v5.c diff | blob | history
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