mips32.c: cache debug caps and support EJTAG 2.0 specific changes 32/1932/4
authorOleksij Rempel <linux@rempel-privat.de>
Wed, 5 Feb 2014 22:11:15 +0000 (23:11 +0100)
committerSpencer Oliver <spen@spen-soft.co.uk>
Tue, 19 Aug 2014 20:18:02 +0000 (20:18 +0000)
commit02ac60b0000977c707011abeac49c58de78bb9e5
tree8dc940d2f26b539b6d40513d73b628f399422e32
parentc13ca4de40d510c7d88d8ce7a43065e8f9209c65
mips32.c: cache debug caps and support EJTAG 2.0 specific changes

EJTAG v2.0 indicated some debug caps in IMP register.
V2.6 moved them to DCR register. To make it more universal,
convert this values and store them for later use.

Change-Id: Id6b9f47c9c2ea94d37281ebfcae5acf357261ddf
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/1932
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
src/target/mips32.c
src/target/mips_ejtag.h

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