David Brownell <david-b@pacbell.net> Clean up some Cortex-M3 reset handling.
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Wed, 19 Aug 2009 06:30:08 +0000 (06:30 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Wed, 19 Aug 2009 06:30:08 +0000 (06:30 +0000)
commit57578b4ea3de4aa86c08ad1ab27ab3a704597534
tree9a88b2ecf863ff75c92ff5e5966f171bf12e5dbf
parent69dd81dcf807afebdbf9644bf2baf023de373f25
David Brownell <david-b@pacbell.net> Clean up some Cortex-M3 reset handling.

 - AIRCR_SYSRESETREQ is generic; use it on any system where
  SRST won't fly, not just on Stellaris-based ones.

 - Reformat and improve comments about the Stellaris quirk; and
  xref the only public docs (an email) about the issue.

It seems that *most* Stellaris chips have this problem.  Tempest
parts aren't yet in general sampling; and if rev B silicon for
earlier chips exists, it's not very visible yet.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2595 b42882b7-edfa-0310-969c-e2dbd0fdcd60
src/target/cortex_m3.c

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