ARM: fix Thumb mode handling when single-stepping register based branch insns
authorNicolas Pitre <nico@fluxnic.net>
Tue, 27 Oct 2009 05:14:34 +0000 (01:14 -0400)
committerDavid Brownell <dbrownell@users.sourceforge.net>
Tue, 27 Oct 2009 06:53:32 +0000 (23:53 -0700)
commit68937cadfb42026b4c8b2c9e43acaf3fb409c4db
tree4f78458325e2cd14b4a1362131aef9c17b6e015e
parent068a6c7895607a6af6758ad18bace683f6b7499d
ARM: fix Thumb mode handling when single-stepping register based branch insns

Currently, OpenOCD is always caching the PC value without the T bit.
This means that assignment to the PC register must clear that bit and set
the processor state to Thumb when it is set.  And when the PC register
value is transferred to another register or stored into memory then
the T bit must be restored.

Discussion: It is arguable if OpenOCd should have preserved the original
PC value which would have greatly simplified this code.  The processor
state could then be obtained simply by getting at bit 0 of the PC.  This
however would require special handling elsewhere instead since the T bit
is not always relevant (like when PC is used with ALU insns or as an index
with some addressing modes).  It is unclear which way would be simpler in
the end.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
src/target/arm_simulator.c

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