stlink: remove reset pulse when entering in JTAG
Until version J14 the behaviour of ST-Link was to send a reset
pulse to the target when the debug connection is started in JTAG
mode. No reset pulse is sent, instead, in SWD mode.
Version J15 introduces a new parameter to avoid the reset pulse in
JTAG mode, aligning the behaviour with SWD.
This reset from the ST-Link, if propagated to the target, prevents
attaching a running target.
Actually this reset pulse is very short (few microsecond) and can
be easily filtered out by an on-board capacitor, usually present
on the reset wire (mainly to filter the bounces of the reset
button). Moreover, most of the use cases for ST-Link are with SWD
(not with JTAG) and this has probably further masked this JTAG
specific behaviour.
OpenOCD can tolerate it but requires the flag "connect_assert_srst"
to the command "reset_config", but the flag is not present in any
configurations in folder tcl. This enforces the guess it was not
noticed due to on-board capacitors or missing connection of reset
pin or ST-Link only used in SWD; so it's safe applying this patch.
Change the default behaviour to avoid reset in JTAG at connection.
There is no need to manage the ST-Link version here, since every
parameter that is not recognized by older ST-Link is treated as
"connect in JTAG with reset pulse", keeping backward compatibility.
Change-Id: Idc97a1457279e3970fd0839cadbff22d9b0302d4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4713
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
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