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at91samd: handle reset run/halt in DSU 78/2778/3
authorTomas Vanek <vanekt@fbl.cz>
Fri, 15 May 2015 09:14:11 +0000 (11:14 +0200)
committerSpencer Oliver <spen@spen-soft.co.uk>
Fri, 20 Nov 2015 18:26:05 +0000 (18:26 +0000)
commit751e2454bf076708d3e695833c4def460ab41d8b
treeb295038edf1a40008c4a45f520956a6793a61852tree | snapshot
parent64802b79391c71474fd7f0a1d9d6c654fb959300commit | diff
at91samd: handle reset run/halt in DSU

Atmel introduced a "Device Service Unit" (DSU) that holds the CPU
in reset if TCK is low when srst (RESET_N) is deasserted.
Function is similar to SMAP in ATSAM4L, see http://openocd.zylin.com/2604

Atmel's EDBG adapter handles DSU reset correctly without this change.

An ordinary SWD adapter leaves TCK in its default state, low.
So without this change any use of sysresetreq or srst
locks the chip in reset state until power is cycled.

A new function dsu_reset_deassert is called as reset-deassert-post event handler.
It optionally prepares reset vector catch and DSU reset is released then.

Additionally SWD clock comment is fixed in at91samdXX.cfg and clock is
lowered a bit to ensure a margin for RC oscillator frequency deviation.
adapter_nsrst_delay 100 is commented out because is no more necessary after
http://openocd.zylin.com/2601

Change-Id: I42e99b1b245f766616c0a0d939f60612c29bd16c
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2778
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
doc/openocd.texi diff | blob | history
src/flash/nor/at91samd.c diff | blob | history
tcl/target/at91samdXX.cfg diff | blob | history
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