Cortex-A8: avoid DSCR reads
authorDavid Brownell <dbrownell@users.sourceforge.net>
Wed, 25 Nov 2009 05:24:44 +0000 (21:24 -0800)
committerDavid Brownell <dbrownell@users.sourceforge.net>
Wed, 25 Nov 2009 05:24:44 +0000 (21:24 -0800)
commitb6210907ea584095cdede663f695eb8afeecef14
tree13844914f68dc154959a27c914e9160ceb658817
parente109bb6af211d3916e4006127945d128b138529b
Cortex-A8: avoid DSCR reads

There was a lot of needless handshaking overhead in the current
Cortex-A8 DCC/ITR operations, since the status read by each step
was discarded rather than letting the next step know it.

This shrinks the handshaking by:  (a) passing status along from
previous steps, avoiding re-fetching; which enables the big win
(b) relying on a useful invariant:  that the DSCR_INSTR_COMP bit
is set after every call to a DPM method.

A "reg sp_usr" call previously took 17 flushes; now it takes just 9.
This visibly speeds common operations like entry to debug state and
stepping, as well as "arm reg" and so on.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
src/target/cortex_a8.c

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