aarch64: allow reading TTBR register when halted in EL0 20/3820/4
authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Thu, 20 Oct 2016 12:46:11 +0000 (14:46 +0200)
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 10 Feb 2017 13:18:35 +0000 (14:18 +0100)
commitba822308560d691263ca26b16d5c9e7a856fb262
treeeadd352abadbfffb7a849df129db803236d4ec66
parent05bf20d05afbcbb723c16cfa0e2f3a93edb435f7
aarch64: allow reading TTBR register when halted in EL0

There's no access to TTBR in EL0. Circumvent by moving the PE to EL1
before reading, and switch back to original mode afterwards.

Change-Id: I22891b958d3d7e6fad1cb27183c192d975d63d89
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
src/target/armv8.c

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