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(parent: 71ca3a1) | patch
flash/nor/spi: add micron MT25QU01G 64/6764/3
authorJaehoon Park <52432979+jaehoon-sifive@users.noreply.github.com>
Tue, 23 Jun 2020 19:39:27 +0000 (04:39 +0900)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sat, 11 Dec 2021 17:49:46 +0000 (17:49 +0000)
commitfdf17dba569ac8aca0771c28b661e3722d776541
tree576124f0b6256a00d88d01c5e8c67048a1258fa5tree | snapshot
parent71ca3a134916c74bb9199d1da0941a77670c914acommit | diff
flash/nor/spi: add micron MT25QU01G

1Gbit SPI flash on VCU118 Rev. 2.0

Contributed to riscv-openocd in https://github.com/riscv/riscv-openocd/pull/487

Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I93447dd970d9901a671567fe8ab9e407432f8db9
Reviewed-on: https://review.openocd.org/c/openocd/+/6764
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
src/flash/nor/spi.c diff | blob | history
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