cortex_a: fix endiannes issues on TI TMS570 64/2064/9
authorSeth LaForge <sethml@google.com>
Tue, 1 Apr 2014 17:26:32 +0000 (10:26 -0700)
committerPaul Fertser <fercerpav@gmail.com>
Mon, 14 Apr 2014 18:20:36 +0000 (18:20 +0000)
commit3427cf2b7e33240fc63c6398090dc7bcbf4f2d52
treeb2ee5f131d6d2250908f0601199e3c65fdf4bbdf
parent31496c2bedd367ea4282328da42c997c85d67c2e
cortex_a: fix endiannes issues on  TI TMS570

The TI TMS470 and TMS570 series of processors are BE-32 processors,
despite BE-32 not being supported by ARM in the Cortex-R4 core. TI
hacked in BE-32 support, which requires odd swizzling in OpenOCD to
make memory reads and writes function correctly. In particular,
without this change, OpenOCD word reads and writes had the bytes
reversed, and halfword and byte packed reads were reading garbage.
In my testing, this change fixes these problems.

Change-Id: I21dd30f4b9003f20fcc85f674ab833407bb61f74
Signed-off-by: Seth LaForge <sethml@google.com>
Reviewed-on: http://openocd.zylin.com/2064
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
src/target/arm_adi_v5.c
src/target/arm_adi_v5.h
tcl/target/ti_tms570.cfg

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