ARM: allow proper single stepping of Thumb BL and BLX instructions

Whenever an unconditional branch with the H bits set to 0b10 is met, the
offset must be combined with the offset from the following opcode and not
ignored like it is now.

A comment in evaluate_b_bl_blx_thumb() suggests that the Thumb2 decoder
would be a simpler solution.  That might be true when single-stepping of
Thumb2 code is implemented.  But for now this appears to be the simplest
solution to fix Thumb1 support.

Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index 646baea70764a6359cd4f2368432641240814d60..5af2c129bea5e7969e72028cd7ff79fce4adb1cf 100644 (file)
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -332,6 +332,18 @@ int arm_simulate_step_core(target_t *target, uint32_t *dry_run_pc, struct arm_si
 
                        return ERROR_OK;
                }
+
+               /* Deal with 32-bit BL/BLX */
+               if ((opcode & 0xf800) == 0xf000) {
+                       uint32_t high = instruction.info.b_bl_bx_blx.target_address;
+                       retval = target_read_u16(target, current_pc+2, &opcode);
+                       if (retval != ERROR_OK)
+                               return retval;
+                       retval = thumb_evaluate_opcode(opcode, current_pc, &instruction);
+                       if (retval != ERROR_OK)
+                               return retval;
+                       instruction.info.b_bl_bx_blx.target_address += high;
+               }
        }
 
        /* examine instruction type */