Hongtao Zheng - more fixes to single stepping. Better hiding of details and fixes...
authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 28 Oct 2008 14:55:25 +0000 (14:55 +0000)
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Tue, 28 Oct 2008 14:55:25 +0000 (14:55 +0000)
git-svn-id: svn://svn.berlios.de/openocd/trunk@1110 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/target/arm7_9_common.c
src/target/arm7_9_common.h
src/target/arm9tdmi.c

index 62045898106744f58f4a59948f50c84385ac80d7..c04968efae4c469e775ab1f66e674ffa23296e75 100644 (file)
@@ -1553,9 +1553,6 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
        if (!current)
                buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
 
-       u32 current_pc;
-       current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
-
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints)
        {
@@ -1567,17 +1564,8 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
                                return retval;
                        }
 
-                       u32 next_pc;
-                       if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
-                       {
-                               u32 current_opcode;
-                               target_read_u32(target, current_pc, &current_opcode);
-                               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
-                               return retval;
-                       }
-
                        LOG_DEBUG("enable single-step");
-                       arm7_9->enable_single_step(target, next_pc);
+                       arm7_9->enable_single_step(target);
 
                        target->debug_reason = DBG_REASON_SINGLESTEP;
 
@@ -1687,13 +1675,23 @@ int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_
        return ERROR_OK;
 }
 
-void arm7_9_enable_eice_step(target_t *target, u32 next_pc)
+void arm7_9_enable_eice_step(target_t *target)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+       int retval;
 
        u32 current_pc;
        current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+       
+       u32 next_pc;
+       if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
+       {
+               u32 current_opcode;
+               target_read_u32(target, current_pc, &current_opcode);
+               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
+               return retval;
+       }
 
        if(next_pc != current_pc)
        {
@@ -1758,9 +1756,6 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
        if (!current)
                buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
 
-       u32 current_pc;
-       current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
-
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints)
                if ((breakpoint = breakpoint_find(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32))))
@@ -1771,21 +1766,12 @@ int arm7_9_step(struct target_s *target, int current, u32 address, int handle_br
 
        target->debug_reason = DBG_REASON_SINGLESTEP;
 
-       u32 next_pc;
-       if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
-       {
-               u32 current_opcode;
-               target_read_u32(target, current_pc, &current_opcode);
-               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
-               return retval;
-       }
-
        if ((retval = arm7_9_restore_context(target)) != ERROR_OK)
        {
                return retval;
        }
 
-       arm7_9->enable_single_step(target, next_pc);
+       arm7_9->enable_single_step(target);
 
        if (armv4_5->core_state == ARMV4_5_STATE_ARM)
        {
index a975b5f3b867ada7ef741eb317c3178dc72c723b..73d8f59e4704f7c8ac963d29549b8dbb8e4c5035 100644 (file)
@@ -8,9 +8,6 @@
  *   Copyright (C) 2008 by Spencer Oliver                                  *
  *   spen@spen-soft.co.uk                                                  *
  *                                                                         *
- *   Copyright (C) 2008 by Hongtao Zheng                                   *
- *   hontor@126.com                                                        *
- *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -96,7 +93,7 @@ typedef struct arm7_9_common_s
        void (*branch_resume)(target_t *target);
        void (*branch_resume_thumb)(target_t *target);
        
-       void (*enable_single_step)(target_t *target, u32 next_pc);
+       void (*enable_single_step)(target_t *target);
        void (*disable_single_step)(target_t *target);
        
        void (*set_special_dbgrq)(target_t *target);
@@ -146,7 +143,7 @@ int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
 int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 
-void arm7_9_enable_eice_step(target_t *target, u32 next_pc);
+void arm7_9_enable_eice_step(target_t *target);
 void arm7_9_disable_eice_step(target_t *target);
 
 int arm7_9_execute_sys_speed(struct target_s *target);
index 89842d504613bf45f2ba1b053e2a5d2a3e39eafd..69e9b79767ee6446f4abd4fd2732d2abb4a14966 100644 (file)
@@ -5,9 +5,6 @@
  *   Copyright (C) 2008 by Spencer Oliver                                  *
  *   spen@spen-soft.co.uk                                                  *
  *                                                                         *
- *   Copyright (C) 2008 by Hongtao Zheng                                   *
- *   hontor@126.com                                                        *
- *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -844,7 +841,7 @@ void arm9tdmi_branch_resume_thumb(target_t *target)
 
 }
 
-void arm9tdmi_enable_single_step(target_t *target, u32 next_pc)
+void arm9tdmi_enable_single_step(target_t *target)
 {
        /* get pointers to arch-specific information */
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -857,7 +854,7 @@ void arm9tdmi_enable_single_step(target_t *target, u32 next_pc)
        }
        else
        {
-               arm7_9_enable_eice_step(target, next_pc);
+               arm7_9_enable_eice_step(target);
        }
 }
 

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)