flash/nor/lpcspifi.c: fix bug that prevented clean reset after flash write

After SPI flash was written by the assembly language stub,
the last SPI command was not terminated by raising CS.
This left the SPI device in a hung state that prevented the
flash from being read by the M4 SPIFI controller, even after
the M4 was fully reset. To access the flash via SPIFI, it was
necessary to completely power cycle the board.

This fix adds the missing instructions to raise CS and
terminate the SPI command after the last byte. This allows
the M4 to be resumed or reset cleanly after flashing. The
SPIFI memory is now immediately accessable at address
0x1400 0000 after flashing is complete.

Change-Id: I4d5e03bded0fa00c430c2991f182dc18611d5f48
Signed-off-by: Anders <anders@openpuma.org>
Reviewed-on: http://openocd.zylin.com/2359
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

diff --git a/contrib/loaders/flash/lpcspifi_write.S b/contrib/loaders/flash/lpcspifi_write.S
index d47129769659744e4c8c81d7f705b15387bc9880..8435a20453ffff142899a9b9d004046e0a008095 100644 (file)
--- a/contrib/loaders/flash/lpcspifi_write.S
+++ b/contrib/loaders/flash/lpcspifi_write.S
@@ -39,6 +39,17 @@
  * r11 - current page end address
  */
 
  * r11 - current page end address
  */
 

+/*
+ * This code is embedded within: src/flash/nor/lpcspifi.c as a "C" array.
+ *
+ * To rebuild:
+ *   arm-none-eabi-gcc -c lpcspifi_write.S
+ *   arm-none-eabi-objcopy -O binary lpcspifi_write.o lpcspifi_write.bin
+ *   xxd -c 8 -i lpcspifi_write.bin > lpcspifi_write.txt
+ *
+ * Then read and edit this result into the "C" source.
+ */
+

 #define SSP_BASE_HIGH                          0x4008
 #define SSP_BASE_LOW                           0x3000
 #define SSP_CR0_OFFSET                         0x00
 #define SSP_BASE_HIGH                          0x4008
 #define SSP_BASE_LOW                           0x3000
 #define SSP_CR0_OFFSET                         0x00


@@ -204,6 +215,7 @@ error:
        movs    r0, #0
        str     r0, [r2, #4]    /* set rp = 0 on error */
 exit:
        movs    r0, #0
        str     r0, [r2, #4]    /* set rp = 0 on error */
 exit:

+       bl              cs_up                   /* end the command before returning */

        mov     r0, r6
        bkpt    #0x00
 
        mov     r0, r6
        bkpt    #0x00
 

diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c
index 7355c30a9ceacc627e9a6d80e1d7d253311cc26a..3b383ebd996004acddff62d4cbd7c1a11a1e80e1 100644 (file)
--- a/src/flash/nor/lpcspifi.c
+++ b/src/flash/nor/lpcspifi.c
@@ -688,7 +688,8 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
                0x00, 0xf0, 0x02, 0xb8, 0x4f, 0xf0, 0x00, 0x08,
                0x4f, 0xf4, 0x80, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
                0xca, 0xf8, 0xab, 0x80, 0x70, 0x47, 0x00, 0x20,
                0x00, 0xf0, 0x02, 0xb8, 0x4f, 0xf0, 0x00, 0x08,
                0x4f, 0xf4, 0x80, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
                0xca, 0xf8, 0xab, 0x80, 0x70, 0x47, 0x00, 0x20,

-               0x50, 0x60, 0x30, 0x46, 0x00, 0xbe, 0xff, 0xff
+               0x50, 0x60, 0xff, 0xf7, 0xef, 0xff, 0x30, 0x46,
+               0x00, 0xbe, 0xff, 0xff

        };
 
        if (target_alloc_working_area(target, sizeof(lpcspifi_flash_write_code),
        };
 
        if (target_alloc_working_area(target, sizeof(lpcspifi_flash_write_code),