Minor cleanup to ARM926 debug entry:

 - don't needlessly export this function
 - handle "case 0" debug method-of-entry better (silent by default)

The "case 0" is a valid debug entry mode so it doesn't deserve the
warning int now gets.  But it probably means that OpenOCD confused
itself somehow; or that it confused the ARM9EJS target.

git-svn-id: svn://svn.berlios.de/openocd/trunk@2799 b42882b7-edfa-0310-969c-e2dbd0fdcd60

diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 8cb5dbe09def6c18877061fea91bdcee5eb4c484..3c80802145890525f6e7aeea9e09d3fe2d2bf6e4 100644 (file)
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -277,7 +277,7 @@ int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2, uint32_t
        return ERROR_OK;
 }
 
-int arm926ejs_examine_debug_reason(target_t *target)
+static int arm926ejs_examine_debug_reason(target_t *target)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
@@ -294,7 +294,11 @@ int arm926ejs_examine_debug_reason(target_t *target)
 
        switch (debug_reason)
        {
-               /* case 0:  no debug entry */
+               case 0:
+                       LOG_DEBUG("no *NEW* debug entry (?missed one?)");
+                       /* ... since last restart or debug reset ... */
+                       target->debug_reason = DBG_REASON_DBGRQ;
+                       break;
                case 1:
                        LOG_DEBUG("breakpoint from EICE unit 0");
                        target->debug_reason = DBG_REASON_BREAKPOINT;