tcl/target/renesas_rz_g2: Added RZ/G2LC and RZ/G2UL 72/6972/2
authormicbis <michele.bisogno.ct@renesas.com>
Tue, 10 May 2022 08:49:31 +0000 (10:49 +0200)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sat, 21 May 2022 09:01:13 +0000 (09:01 +0000)
Added support for two new devices: RZ/G2LC and RZ/G2UL

Change-Id: Iec6ba88c1d279f50808b060343b45c796bbfdbfc
Signed-off-by: micbis <michele.bisogno.ct@renesas.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6972
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
tcl/target/renesas_rz_g2.cfg

index 3615aa0e2fa14e0695dee36fb3ca95c1b62285ec..a3d5f48fbc8c7096750031444037569985584d58 100644 (file)
@@ -6,11 +6,13 @@
 # - Each SOC can boot through the Cortex-A5x cores
 
 # Supported RZ/G2 SOCs and their cores:
-# RZ/G2H: Cortex-A57 x4, Cortex-A53 x4, Cortex-R7
-# RZ/G2M: Cortex-A57 x2, Cortex-A53 x4, Cortex-R7
-# RZ/G2N: Cortex-A57 x2,                Cortex-R7
-# RZ/G2E:                Cortex-A53 x2, Cortex-R7
-# RZ/G2L:                Cortex-A55 x2, Cortex-M33
+# RZ/G2H:   Cortex-A57 x4, Cortex-A53 x4, Cortex-R7
+# RZ/G2M:   Cortex-A57 x2, Cortex-A53 x4, Cortex-R7
+# RZ/G2N:   Cortex-A57 x2,                Cortex-R7
+# RZ/G2E:                  Cortex-A53 x2, Cortex-R7
+# RZ/G2L:                  Cortex-A55 x2, Cortex-M33
+# RZ/G2LC:                 Cortex-A55 x2, Cortex-M33
+# RZ/G2UL:                 Cortex-A55 x1, Cortex-M33
 
 # Usage:
 # There are 2 configuration options:
@@ -75,6 +77,20 @@ switch $_soc {
                set _boot_core CA55
                set _ap_num 0
        }
+       G2LC {
+               set _CHIPNAME r9a07g044c
+               set _num_ca55 2
+               set _num_cm33 1
+               set _boot_core CA55
+               set _ap_num 0
+       }
+       G2UL {
+               set _CHIPNAME r9a07g043u
+               set _num_ca55 1
+               set _num_cm33 1
+               set _boot_core CA55
+               set _ap_num 0
+       }
        default {
                error "'$_soc' is invalid!"
        }
@@ -169,7 +185,7 @@ if { $_boot_core == "CA57" } {
 echo "SMP targets:$smp_targets"
 eval "target smp $smp_targets"
 
-if { $_soc == "G2L"} {
+if { $_soc == "G2L" || $_soc == "G2LC" || $_soc == "G2UL" } {
        target create $_CHIPNAME.axi_ap mem_ap -dap $_DAPNAME -ap-num 1
 }
 

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)