Remove misleading typedef and redundant suffix from struct armv7a_common.
void armv7a_show_fault_registers(target_t *target)
{
uint32_t dfsr, ifsr, dfar, ifar;
void armv7a_show_fault_registers(target_t *target)
{
uint32_t dfsr, ifsr, dfar, ifar;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr);
armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr);
armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr);
armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr);
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
COMMAND_HANDLER(handle_dap_baseaddr_command)
{
target_t *target = get_current_target(cmd_ctx);
COMMAND_HANDLER(handle_dap_baseaddr_command)
{
target_t *target = get_current_target(cmd_ctx);
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp);
COMMAND_HANDLER(handle_dap_memaccess_command)
{
target_t *target = get_current_target(cmd_ctx);
COMMAND_HANDLER(handle_dap_memaccess_command)
{
target_t *target = get_current_target(cmd_ctx);
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp);
COMMAND_HANDLER(handle_dap_apsel_command)
{
target_t *target = get_current_target(cmd_ctx);
COMMAND_HANDLER(handle_dap_apsel_command)
{
target_t *target = get_current_target(cmd_ctx);
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp);
COMMAND_HANDLER(handle_dap_apid_command)
{
target_t *target = get_current_target(cmd_ctx);
COMMAND_HANDLER(handle_dap_apid_command)
{
target_t *target = get_current_target(cmd_ctx);
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
return CALL_COMMAND_HANDLER(dap_apid_command, swjdp);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
return CALL_COMMAND_HANDLER(dap_apid_command, swjdp);
COMMAND_HANDLER(handle_dap_info_command)
{
target_t *target = get_current_target(cmd_ctx);
COMMAND_HANDLER(handle_dap_info_command)
{
target_t *target = get_current_target(cmd_ctx);
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
uint32_t apsel;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
uint32_t apsel;
#define V2POWUR 6
#define V2POWUW 7
#define V2POWUR 6
#define V2POWUW 7
-typedef struct armv7a_common_s
{
int common_magic;
reg_cache_t *core_cache;
{
int common_magic;
reg_cache_t *core_cache;
void (*pre_restore_context)(target_t *target);
void (*post_restore_context)(target_t *target);
void (*pre_restore_context)(target_t *target);
void (*post_restore_context)(target_t *target);
-static inline struct armv7a_common_s *
+static inline struct armv7a_common *
target_to_armv7a(struct target_s *target)
{
target_to_armv7a(struct target_s *target)
{
- return container_of(target->arch_info, struct armv7a_common_s,
+ return container_of(target->arch_info, struct armv7a_common,
int num;
enum armv7a_mode mode;
target_t *target;
int num;
enum armv7a_mode mode;
target_t *target;
- armv7a_common_t *armv7a_common;
+ struct armv7a_common *armv7a_common;
} armv7a_core_reg_t;
int armv7a_arch_state(struct target_s *target);
reg_cache_t *armv7a_build_reg_cache(target_t *target,
} armv7a_core_reg_t;
int armv7a_arch_state(struct target_s *target);
reg_cache_t *armv7a_build_reg_cache(target_t *target,
- armv7a_common_t *armv7a_common);
+ struct armv7a_common *armv7a_common);
int armv7a_register_commands(struct command_context_s *cmd_ctx);
int armv7a_register_commands(struct command_context_s *cmd_ctx);
-int armv7a_init_arch_info(target_t *target, armv7a_common_t *armv7a);
+int armv7a_init_arch_info(target_t *target, struct armv7a_common *armv7a);
/* map psr mode bits to linear number */
static inline int armv7a_mode_to_number(enum armv7a_mode mode)
/* map psr mode bits to linear number */
static inline int armv7a_mode_to_number(enum armv7a_mode mode)
*/
static int cortex_a8_init_debug_access(target_t *target)
{
*/
static int cortex_a8_init_debug_access(target_t *target)
{
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int retval;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int retval;
{
uint32_t dscr;
int retval;
{
uint32_t dscr;
int retval;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
LOG_DEBUG("exec opcode 0x%08" PRIx32, opcode);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
LOG_DEBUG("exec opcode 0x%08" PRIx32, opcode);
uint32_t * regfile)
{
int retval = ERROR_OK;
uint32_t * regfile)
{
int retval = ERROR_OK;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
cortex_a8_dap_read_coreregister_u32(target, regfile, 0);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
cortex_a8_dap_read_coreregister_u32(target, regfile, 0);
uint8_t op1, uint8_t CRn, uint8_t CRm, uint8_t op2)
{
int retval;
uint8_t op1, uint8_t CRn, uint8_t CRm, uint8_t op2)
{
int retval;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
cortex_a8_exec_opcode(target, ARMV4_5_MRC(CP, op1, 0, CRn, CRm, op2));
struct swjdp_common *swjdp = &armv7a->swjdp_info;
cortex_a8_exec_opcode(target, ARMV4_5_MRC(CP, op1, 0, CRn, CRm, op2));
{
int retval;
uint32_t dscr;
{
int retval;
uint32_t dscr;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
LOG_DEBUG("CP%i, CRn %i, value 0x%08" PRIx32, CP, CRn, value);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
LOG_DEBUG("CP%i, CRn %i, value 0x%08" PRIx32, CP, CRn, value);
int retval = ERROR_OK;
uint8_t reg = regnum&0xFF;
uint32_t dscr;
int retval = ERROR_OK;
uint8_t reg = regnum&0xFF;
uint32_t dscr;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
if (reg > 16)
struct swjdp_common *swjdp = &armv7a->swjdp_info;
if (reg > 16)
int retval = ERROR_OK;
uint8_t Rd = regnum&0xFF;
uint32_t dscr;
int retval = ERROR_OK;
uint8_t Rd = regnum&0xFF;
uint32_t dscr;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
LOG_DEBUG("register %i, value 0x%08" PRIx32, regnum, value);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
LOG_DEBUG("register %i, value 0x%08" PRIx32, regnum, value);
static int cortex_a8_dap_write_memap_register_u32(target_t *target, uint32_t address, uint32_t value)
{
int retval;
static int cortex_a8_dap_write_memap_register_u32(target_t *target, uint32_t address, uint32_t value)
{
int retval;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
retval = mem_ap_write_atomic_u32(swjdp, address, value);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
retval = mem_ap_write_atomic_u32(swjdp, address, value);
int retval = ERROR_OK;
uint32_t dscr;
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
int retval = ERROR_OK;
uint32_t dscr;
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
- struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common;
+ struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
enum target_state prev_target_state = target->state;
uint8_t saved_apsel = dap_ap_get_select(swjdp);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
enum target_state prev_target_state = target->state;
uint8_t saved_apsel = dap_ap_get_select(swjdp);
{
int retval = ERROR_OK;
uint32_t dscr;
{
int retval = ERROR_OK;
uint32_t dscr;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
uint8_t saved_apsel = dap_ap_get_select(swjdp);
dap_ap_select(swjdp, swjdp_debugap);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
uint8_t saved_apsel = dap_ap_get_select(swjdp);
dap_ap_select(swjdp, swjdp_debugap);
static int cortex_a8_resume(struct target_s *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
{
static int cortex_a8_resume(struct target_s *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
{
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int retval = ERROR_OK;
working_area_t *regfile_working_area = NULL;
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
int retval = ERROR_OK;
working_area_t *regfile_working_area = NULL;
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
static void cortex_a8_post_debug_entry(target_t *target)
{
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
static void cortex_a8_post_debug_entry(target_t *target)
{
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
- struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common;
+ struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
// cortex_a8_read_cp(target, &cp15_control_register, 15, 0, 1, 0, 0);
/* examine cp15 control reg */
// cortex_a8_read_cp(target, &cp15_control_register, 15, 0, 1, 0, 0);
/* examine cp15 control reg */
static int cortex_a8_step(struct target_s *target, int current, uint32_t address,
int handle_breakpoints)
{
static int cortex_a8_step(struct target_s *target, int current, uint32_t address,
int handle_breakpoints)
{
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
breakpoint_t *breakpoint = NULL;
breakpoint_t stepbreakpoint;
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
breakpoint_t *breakpoint = NULL;
breakpoint_t stepbreakpoint;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
LOG_DEBUG(" ");
struct armv4_5_common_s *armv4_5 = &armv7a->armv4_5_common;
LOG_DEBUG(" ");
uint32_t control;
uint8_t byte_addr_select = 0x0F;
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
uint32_t control;
uint8_t byte_addr_select = 0x0F;
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
- struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common;
+ struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
cortex_a8_brp_t * brp_list = cortex_a8->brp_list;
if (breakpoint->set)
cortex_a8_brp_t * brp_list = cortex_a8->brp_list;
if (breakpoint->set)
{
int retval;
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
{
int retval;
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
- struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common;
+ struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
cortex_a8_brp_t * brp_list = cortex_a8->brp_list;
if (!breakpoint->set)
cortex_a8_brp_t * brp_list = cortex_a8->brp_list;
if (!breakpoint->set)
static int cortex_a8_read_memory(struct target_s *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
static int cortex_a8_read_memory(struct target_s *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int retval = ERROR_OK;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int retval = ERROR_OK;
int cortex_a8_write_memory(struct target_s *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
int cortex_a8_write_memory(struct target_s *target, uint32_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int retval;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int retval;
target_t *target = priv;
if (!target->type->examined)
return ERROR_OK;
target_t *target = priv;
if (!target->type->examined)
return ERROR_OK;
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
struct swjdp_common *swjdp = &armv7a->swjdp_info;
if (!target->dbg_msg_enabled)
struct swjdp_common *swjdp = &armv7a->swjdp_info;
if (!target->dbg_msg_enabled)
static int cortex_a8_examine(struct target_s *target)
{
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
static int cortex_a8_examine(struct target_s *target)
{
struct cortex_a8_common_s *cortex_a8 = target_to_cortex_a8(target);
- struct armv7a_common_s *armv7a = &cortex_a8->armv7a_common;
+ struct armv7a_common *armv7a = &cortex_a8->armv7a_common;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int i;
int retval = ERROR_OK;
struct swjdp_common *swjdp = &armv7a->swjdp_info;
int i;
int retval = ERROR_OK;
cortex_a8_common_t *cortex_a8, struct jtag_tap *tap)
{
armv4_5_common_t *armv4_5;
cortex_a8_common_t *cortex_a8, struct jtag_tap *tap)
{
armv4_5_common_t *armv4_5;
- armv7a_common_t *armv7a;
+ struct armv7a_common *armv7a;
armv7a = &cortex_a8->armv7a_common;
armv4_5 = &armv7a->armv4_5_common;
armv7a = &cortex_a8->armv7a_common;
armv4_5 = &armv7a->armv4_5_common;
COMMAND_HANDLER(cortex_a8_handle_cache_info_command)
{
target_t *target = get_current_target(cmd_ctx);
COMMAND_HANDLER(cortex_a8_handle_cache_info_command)
{
target_t *target = get_current_target(cmd_ctx);
- struct armv7a_common_s *armv7a = target_to_armv7a(target);
+ struct armv7a_common *armv7a = target_to_armv7a(target);
return armv4_5_handle_cache_info_command(cmd_ctx,
&armv7a->armv4_5_mmu.armv4_5_cache);
return armv4_5_handle_cache_info_command(cmd_ctx,
&armv7a->armv4_5_mmu.armv4_5_cache);
/* Use cortex_a8_read_regs_through_mem for fast register reads */
int fast_reg_read;
/* Use cortex_a8_read_regs_through_mem for fast register reads */
int fast_reg_read;
- armv7a_common_t armv7a_common;
+ struct armv7a_common armv7a_common;
} cortex_a8_common_t;
static inline struct cortex_a8_common_s *
} cortex_a8_common_t;
static inline struct cortex_a8_common_s *
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