flash/nor/at91samd: fix chip erase of a secured device

'at91samd chip-erase' command did not work on secured device.

Fix it changing address of DSU.CTRL register
(see Atmel SAM D21 datasheet, 13.9. Intellectual Property Protection).

While on it check error return of DSU.CTRL write.

Change-Id: I83155a634a5458cdc0cc16c99c0e155eb1d8b3d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Thomas Irmen <tirmen@gmx.net>
Reviewed-on: http://openocd.zylin.com/4043
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c
index 2673b0eecadd858e1065557919106f4b2726f99f..f018e893d5da0366f77af54c97393059f49e6cab 100644 (file)
--- a/src/flash/nor/at91samd.c
+++ b/src/flash/nor/at91samd.c
@@ -36,6 +36,7 @@
 
 #define SAMD_DSU_STATUSA        1               /* DSU status register */
 #define SAMD_DSU_DID           0x18            /* Device ID register */
 
 #define SAMD_DSU_STATUSA        1               /* DSU status register */
 #define SAMD_DSU_DID           0x18            /* Device ID register */

+#define SAMD_DSU_CTRL_EXT      0x100           /* CTRL register, external access */

 
 #define SAMD_NVMCTRL_CTRLA             0x00    /* NVM control A register */
 #define SAMD_NVMCTRL_CTRLB             0x04    /* NVM control B register */
 
 #define SAMD_NVMCTRL_CTRLA             0x00    /* NVM control A register */
 #define SAMD_NVMCTRL_CTRLB             0x04    /* NVM control B register */


@@ -859,18 +860,23 @@ COMMAND_HANDLER(samd_handle_info_command)
 COMMAND_HANDLER(samd_handle_chip_erase_command)
 {
        struct target *target = get_current_target(CMD_CTX);
 COMMAND_HANDLER(samd_handle_chip_erase_command)
 {
        struct target *target = get_current_target(CMD_CTX);

+       int res = ERROR_FAIL;

 
        if (target) {
                /* Enable access to the DSU by disabling the write protect bit */
                target_write_u32(target, SAMD_PAC1, (1<<1));
 
        if (target) {
                /* Enable access to the DSU by disabling the write protect bit */
                target_write_u32(target, SAMD_PAC1, (1<<1));

+               /* intentionally without error checking - not accessible on secured chip */
+

                /* Tell the DSU to perform a full chip erase.  It takes about 240ms to
                 * perform the erase. */
                /* Tell the DSU to perform a full chip erase.  It takes about 240ms to
                 * perform the erase. */

-               target_write_u8(target, SAMD_DSU, (1<<4));
-
-               command_print(CMD_CTX, "chip erased");
+               res = target_write_u8(target, SAMD_DSU + SAMD_DSU_CTRL_EXT, (1<<4));
+               if (res == ERROR_OK)
+                       command_print(CMD_CTX, "chip erase started");
+               else
+                       command_print(CMD_CTX, "write to DSU CTRL failed");

        }
 
        }
 

-       return ERROR_OK;
+       return res;

 }
 
 COMMAND_HANDLER(samd_handle_set_security_command)
 }
 
 COMMAND_HANDLER(samd_handle_set_security_command)