jtag/drivers cmsis-dap: fix speed setting on Atmel EDBG

Without the change Atmel EDBG uses default clock freq about 168 kHz
instead adapter_khz configured before interface init.
Changing adapter speed after init works as expected.

Testing shows the EDBG firmware resets speed to default during DAP_SWJ_Sequence.
Tested with fw versions 03.1F.01AE and 02.09.0169

This change repeats the DAP_SWJ_Clock command after sending a SWJ sequence.

Change-Id: Ic70457c5df635f47cad5e70b0dc83a083ea1b3a3
Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3944
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

diff --git a/src/jtag/drivers/cmsis_dap_usb.c b/src/jtag/drivers/cmsis_dap_usb.c
index dd37522ad169e595cc05cedd0a2f3caed93e0cdb..cffd5e7f1a60cd1df66bef47e06161e1062ba181 100644 (file)
--- a/src/jtag/drivers/cmsis_dap_usb.c
+++ b/src/jtag/drivers/cmsis_dap_usb.c
@@ -821,7 +821,13 @@ static int cmsis_dap_swd_switch_seq(enum swd_special_seq seq)
                return ERROR_FAIL;
        }
 
-       return cmsis_dap_cmd_DAP_SWJ_Sequence(s_len, s);
+       retval = cmsis_dap_cmd_DAP_SWJ_Sequence(s_len, s);
+       if (retval != ERROR_OK)
+               return retval;
+
+       /* Atmel EDBG needs renew clock setting after SWJ_Sequence
+        * otherwise default frequency is used */
+       return cmsis_dap_cmd_DAP_SWJ_Clock(jtag_get_speed_khz());
 }
 
 static int cmsis_dap_swd_open(void)