target_write_u32(target, MC_FCR[bank->bank_number], fcr);
LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number+1, pagen);
- if ((at91sam7_info->cidr_arch == 0x60) && ((cmd==SLB)|(cmd==CLB)))
+ if ((at91sam7_info->cidr_arch == 0x60) && ((cmd == SLB)|(cmd == CLB)))
{
/* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */
if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C)
/* flash auto-erase is disabled by default*/
int auto_erase = 0;
- if (strcmp(args[0], "erase")==0)
+ if (strcmp(args[0], "erase") == 0)
{
auto_erase = 1;
args++;
fileio_close(&fileio);
return retvaltemp;
}
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
command_print(cmd_ctx,
"wrote %lld byte from file %s to flash bank %li at offset 0x%8.8" PRIx32 " in %s (%f kb/s)",
int i;
/* check preconditions */
- if (ocl->buflen == 0 || ocl->bufalign==0)
+ if (ocl->buflen == 0 || ocl->bufalign == 0)
return ERROR_FLASH_BANK_NOT_PROBED;
if (bank->target->state != TARGET_RUNNING)
{
ocl_priv_t *ocl = bank->driver_priv;
- if (ocl->buflen == 0 || ocl->bufalign==0)
+ if (ocl->buflen == 0 || ocl->bufalign == 0)
return ERROR_FLASH_BANK_NOT_PROBED;
return ERROR_OK;
do {
asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) : );
- } while ((dcc_reg&1)==0);
+ } while ((dcc_reg&1) == 0);
asm volatile ("mrc p14, 0, %0, C1, C0" : "=r" (dcc_reg) : );
return dcc_reg;
else efc_ofs=0;
/* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* calculate page address, only lower 8 bits are used to address the latch,
but the upper part of address is needed for writing to proper EFC */
outr(MC_FCR+efc_ofs, ((page_num&0x3ff) << 8) | MC_KEY | MC_FCMD_WP);
/* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* check for errors */
if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
if (lockbits&1) {
/* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
outr(MC_FCR+efc_ofs, ((page_num&0x3ff) << 8) | 0x5a000004);
/* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* check for errors */
if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
}
/* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* erase all command to FCR */
outr(MC_FCR+efc_ofs, 0x5a000008);
/* wait until it's done */
- while ((inr(MC_FSR+efc_ofs)&MC_FRDY)==0);
+ while ((inr(MC_FSR+efc_ofs)&MC_FRDY) == 0);
/* check for errors */
if ((inr(MC_FSR+efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
break;
alive_sleep(1);
}
- if (timeout==1000)
+ if (timeout == 1000)
{
LOG_ERROR("erase timed out");
return ERROR_FAIL;
break;
alive_sleep(1);
}
- if (timeout==1000)
+ if (timeout == 1000)
{
LOG_ERROR("write timed out");
return ERROR_FAIL;
break;
alive_sleep(1);
}
- if (timeout==1000)
+ if (timeout == 1000)
{
LOG_ERROR("write timed out");
return ERROR_FAIL;
/* inlining this will help show what fn that is taking time during profiling. */
static inline void buf_set_u32(uint8_t* buffer, unsigned int first, unsigned int num, uint32_t value)
{
- if ((num==32) && (first==0))
+ if ((num == 32) && (first == 0))
{
buffer[3]=(value >> 24)&0xff;
buffer[2]=(value >> 16)&0xff;
}
static inline uint32_t buf_get_u32(const uint8_t* buffer, unsigned int first, unsigned int num)
{
- if ((num==32) && (first==0))
+ if ((num == 32) && (first == 0))
{
return (((uint32_t)buffer[3]) << 24)|(((uint32_t)buffer[2]) << 16)|(((uint32_t)buffer[1]) << 8)|(((uint32_t)buffer[0]) << 0);
} else
* to the fn and fish it out manually.
*/
c = interp->cmdPrivData;
- if (c==NULL)
+ if (c == NULL)
{
- LOG_ERROR("BUG: interp->cmdPrivData==NULL");
+ LOG_ERROR("BUG: interp->cmdPrivData == NULL");
return JIM_ERR;
}
target_call_timer_callbacks_now();
*return_retval = retval;
}
- return (retval==ERROR_OK)?JIM_OK:JIM_ERR;
+ return (retval == ERROR_OK)?JIM_OK:JIM_ERR;
}
/* nice short description of source file */
}
/* just a placeholder, no handler */
- if (c->handler==NULL)
+ if (c->handler == NULL)
return c;
/* If this is a two level command, e.g. "flash banks", then the
/* We do not print the connection closed error message */
Jim_PrintErrorMessage(interp);
}
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
/* It wasn't a low level OpenOCD command that failed */
return ERROR_FAIL;
#if !BUILD_ECOSBOARD
Jim_EventLoopOnLoad(interp);
#endif
- if (Jim_Eval_Named(interp, startup_tcl, "embedded:startup.tcl",1)==JIM_ERR)
+ if (Jim_Eval_Named(interp, startup_tcl, "embedded:startup.tcl",1) == JIM_ERR)
{
LOG_ERROR("Failed to run startup.tcl (embedded into OpenOCD compile time)");
Jim_PrintErrorMessage(interp);
if (argc != 1)
return ERROR_COMMAND_SYNTAX_ERROR;
- fast_and_dangerous = strcmp("enable", args[0])==0;
+ fast_and_dangerous = strcmp("enable", args[0]) == 0;
return ERROR_OK;
}
{
Jim_Obj *objPtr=Jim_GetGlobalVariableStr(interp, variable, JIM_ERRMSG);
long t;
- if (Jim_GetLong(interp, objPtr, &t)==JIM_OK)
+ if (Jim_GetLong(interp, objPtr, &t) == JIM_OK)
{
return t;
}
} else
{
char *full_path=find_file(file);
- if (full_path==NULL)
+ if (full_path == NULL)
return NULL;
FILE *fp = NULL;
fp = fopen(full_path, mode);
FILE * pFile;
pFile = fopen(fileName,"rb");
- if (pFile==NULL)
+ if (pFile == NULL)
{
LOG_ERROR("Can't open %s\n", fileName);
return ERROR_FAIL;
return ERROR_FAIL;
}
*data = malloc(*len + 1);
- if (*data==NULL)
+ if (*data == NULL)
{
LOG_ERROR("Can't open %s\n", fileName);
fclose(pFile);
break;
}
}
- if ((i==argc) && (fwrite("\n", 1, 1, config_file)==1))
+ if ((i == argc) && (fwrite("\n", 1, 1, config_file) == 1))
{
retval=ERROR_OK;
}
chunk = maxChunk;
}
- if ((retval==ERROR_OK) && (fwrite(((char *)data)+pos, 1, chunk, f) != chunk))
+ if ((retval == ERROR_OK) && (fwrite(((char *)data)+pos, 1, chunk, f) != chunk))
retval = ERROR_INVALID_ARGUMENTS;
if (retval != ERROR_OK)
DIR *dirp;
dirp = opendir(destdir);
- if (dirp==NULL)
+ if (dirp == NULL)
{
mkdir(destdir, 0777);
} else
if (entry == NULL)
break;
- if ((strcmp(".", entry->d_name)==0)||(strcmp("..", entry->d_name)==0))
+ if ((strcmp(".", entry->d_name) == 0)||(strcmp("..", entry->d_name) == 0))
continue;
Jim_ListAppendElement(interp, objPtr, Jim_NewStringObj(interp, entry->d_name, strlen(entry->d_name)));
* digit. For instance, if the range for quads is
* [-9223372036854775808..9223372036854775807] and the input base
* is 10, cutoff will be set to 922337203685477580 and cutlim to
- * either 7 (neg==0) or 8 (neg==1), meaning that if we have
+ * either 7 (neg == 0) or 8 (neg == 1), meaning that if we have
* accumulated a value > 922337203685477580, or equal but the
* next digit is > 7 (or 8), the number is too big, and we will
* return a range error.
static jim_wide JimPowWide(jim_wide b, jim_wide e)
{
jim_wide i, res = 1;
- if ((b==0 && e != 0) || (e<0)) return 0;
+ if ((b == 0 && e != 0) || (e<0)) return 0;
for (i=0; i<e; i++) {res *= b;}
return res;
}
void *Jim_Alloc(int size)
{
/* We allocate zero length arrayes, etc. to use a single orthogonal codepath */
- if (size==0)
+ if (size == 0)
size=1;
void *p = malloc(size);
if (p == NULL)
void *Jim_Realloc(void *ptr, int size)
{
/* We allocate zero length arrayes, etc. to use a single orthogonal codepath */
- if (size==0)
+ if (size == 0)
size=1;
void *p = realloc(ptr, size);
if (p == NULL)
case JIM_EXPROP_GTE: wC = wA >= wB; break;
case JIM_EXPROP_LSHIFT: wC = wA << wB; break;
case JIM_EXPROP_RSHIFT: wC = wA >> wB; break;
- case JIM_EXPROP_NUMEQ: wC = wA==wB; break;
+ case JIM_EXPROP_NUMEQ: wC = wA == wB; break;
case JIM_EXPROP_NUMNE: wC = wA != wB; break;
case JIM_EXPROP_BITAND: wC = wA&wB; break;
case JIM_EXPROP_BITXOR: wC = wA^wB; break;
case JIM_EXPROP_GT: dC = dA>dB; break;
case JIM_EXPROP_LTE: dC = dA <= dB; break;
case JIM_EXPROP_GTE: dC = dA >= dB; break;
- case JIM_EXPROP_NUMEQ: dC = dA==dB; break;
+ case JIM_EXPROP_NUMEQ: dC = dA == dB; break;
case JIM_EXPROP_NUMNE: dC = dA != dB; break;
case JIM_EXPROP_LOGICAND_LEFT:
if (dA == 0) {
* An NVP Table is terminated with ".name=NULL".
*
* During the 'name2value' operation, if no matching string is found
- * the pointer to the terminal element (with p->name==NULL) is returned.
+ * the pointer to the terminal element (with p->name == NULL) is returned.
*
* Example:
* \code
for (bit_cnt = 0; bit_cnt < scan_size; bit_cnt++)
{
int val=0;
- int tms=(bit_cnt==scan_size-1) ? 1 : 0;
+ int tms=(bit_cnt == scan_size-1) ? 1 : 0;
int tdi;
int bytec=bit_cnt/8;
int bcval=1 << (bit_cnt % 8);
while (bitq_in_state.cmd)
{
/* only JTAG_SCAN command may return data */
- if (bitq_in_state.cmd->type==JTAG_SCAN)
+ if (bitq_in_state.cmd->type == JTAG_SCAN)
{
/* loop through the fields */
while (bitq_in_state.field_idx<bitq_in_state.cmd->cmd.scan->num_fields)
field = &bitq_in_state.cmd->cmd.scan->fields[bitq_in_state.field_idx];
if (field->in_value)
{
- if (bitq_in_state.bit_pos==0)
+ if (bitq_in_state.bit_pos == 0)
{
/* initialize field scanning */
in_mask = 0x01;
bitq_in_bufsize *= 2;
}
/* if necessary, allocate buffer and check for malloc error */
- if (bitq_in_buffer==NULL && ( bitq_in_buffer = malloc(bitq_in_bufsize) )==NULL)
+ if (bitq_in_buffer == NULL && ( bitq_in_buffer = malloc(bitq_in_bufsize) ) == NULL)
{
LOG_ERROR("malloc error");
exit(-1);
#endif
return;
}
- if (in_mask==0x01)
+ if (in_mask == 0x01)
in_buff[in_idx] = 0;
if (tdo)
in_buff[in_idx] |= in_mask;
- if (in_mask==0x80)
+ if (in_mask == 0x80)
{
in_mask = 0x01;
in_idx++;
else
tdo_req = 0;
- if (field->out_value==NULL)
+ if (field->out_value == NULL)
{
/* just send zeros and request data from TDO */
for (bit_cnt = field->num_bits; bit_cnt>1; bit_cnt--)
for (bit_cnt = field->num_bits; bit_cnt>1; bit_cnt--)
{
bitq_io(0, ( (*out_ptr) & out_mask ) != 0, tdo_req);
- if (out_mask==0x80)
+ if (out_mask == 0x80)
{
out_mask = 0x01;
out_ptr++;
if (pause)
{
bitq_io(0, 0, 0);
- if (tap_get_state()==TAP_IRSHIFT)
+ if (tap_get_state() == TAP_IRSHIFT)
tap_set_state(TAP_IRPAUSE);
- else if (tap_get_state()==TAP_DRSHIFT)
+ else if (tap_get_state() == TAP_DRSHIFT)
tap_set_state(TAP_DRPAUSE);
}
}
tap_state_name(goal_state) );
- if (goal_state==cur_state )
+ if (goal_state == cur_state )
; /* nothing to do */
- else if ( goal_state==TAP_RESET )
+ else if ( goal_state == TAP_RESET )
{
jtag_add_tlr();
}
*/
if ((jtag_reset_config & RESET_HAS_SRST)&&
(jtag_reset_config & RESET_HAS_TRST)&&
- ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
+ ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0))
{
if (((req_tlr_or_trst&&!jtag_trst)||
(!req_tlr_or_trst && jtag_trst))&&
{
assert(field->in_value != NULL);
- if (value==NULL)
+ if (value == NULL)
{
/* no checking to do */
return;
if (jtag_reset_config & RESET_HAS_SRST)
{
jtag_add_reset(1, 1);
- if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
+ if ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0)
jtag_add_reset(0, 1);
}
jtag_add_reset(0, 0);
int retval;
if ((retval=jtag_interface_init(cmd_ctx)) != ERROR_OK)
return retval;
- if (jtag_init_inner(cmd_ctx)==ERROR_OK)
+ if (jtag_init_inner(cmd_ctx) == ERROR_OK)
{
return ERROR_OK;
}
entry->data2=data2;
entry->data3=data3;
- if (jtag_callback_queue_head==NULL)
+ if (jtag_callback_queue_head == NULL)
{
jtag_callback_queue_head=entry;
jtag_callback_queue_tail=entry;
static int dummy_khz(int khz, int *jtag_speed)
{
- if (khz==0)
+ if (khz == 0)
{
*jtag_speed=0;
}
static int dummy_speed_div(int speed, int *khz)
{
- if (speed==0)
+ if (speed == 0)
{
*khz = 0;
}
#include <assert.h>
-#if (BUILD_FT2232_FTD2XX==1 && BUILD_FT2232_LIBFTDI==1)
+#if (BUILD_FT2232_FTD2XX == 1 && BUILD_FT2232_LIBFTDI == 1)
#error "BUILD_FT2232_FTD2XX && BUILD_FT2232_LIBFTDI are mutually exclusive"
#elif (BUILD_FT2232_FTD2XX != 1 && BUILD_FT2232_LIBFTDI != 1)
#error "BUILD_FT2232_FTD2XX || BUILD_FT2232_LIBFTDI must be chosen"
*/
++tms_ndx;
- if (tms_ndx==7 || i==tms_count-1)
+ if (tms_ndx == 7 || i == tms_count-1)
{
buffer_write(mpsse_cmd);
buffer_write(tms_ndx - 1);
static int ft2232_khz(int khz, int* jtag_speed)
{
- if (khz==0)
+ if (khz == 0)
{
#ifdef BUILD_FTD2XX_HIGHSPEED
*jtag_speed = 0;
const ft2232_layout_t* cur_layout = ft2232_layouts;
int i;
- if (tap_get_tms_path_len(TAP_IRPAUSE,TAP_IRPAUSE)==7)
+ if (tap_get_tms_path_len(TAP_IRPAUSE,TAP_IRPAUSE) == 7)
{
LOG_DEBUG("ft2232 interface using 7 step jtag state transitions");
}
/* JLink returns an extra NULL in packet when size of in message is a multiple of 64, creates problems with usb comms */
/* WARNING This will interfere with tap state counting */
- while ((TAP_SCAN_BYTES(tap_length)%64)==0)
+ while ((TAP_SCAN_BYTES(tap_length)%64) == 0)
{
jlink_tap_append_step((tap_get_state() == TAP_RESET)?1:0, 0);
}
if (1 != result2)
{
LOG_ERROR("jlink_usb_read_emu_result retried requested=1, result=%d, in_length=%i", result2,in_length);
- /* Try again once, should only happen if (in_length%64==0) */
+ /* Try again once, should only happen if (in_length%64 == 0) */
result2 = jlink_usb_read_emu_result(jlink_jtag);
if (1 != result2)
{
if (presto->buff_out_pos >= BUFFER_SIZE)
#elif BUILD_PRESTO_LIBFTDI == 1
/* libftdi does not do background read, be sure that USB IN buffer does not overflow (128 bytes only!) */
- if (presto->buff_out_pos >= BUFFER_SIZE || presto->buff_in_exp==128)
+ if (presto->buff_out_pos >= BUFFER_SIZE || presto->buff_in_exp == 128)
#endif
return presto_flush();
for (i = 0; i < num_fields; i++)
{
tap = jtag_tap_by_string( args[i*2] );
- if (tap==NULL)
+ if (tap == NULL)
{
command_print( cmd_ctx, "Tap: %s unknown", args[i*2] );
return ERROR_FAIL;
{
send_bits = size;
loops = size/8;
- /* if (loops==0) */
+ /* if (loops == 0) */
loops++;
size = 0;
}
do
{
ZY1000_PEEK(ZY1000_JTAG_BASE+0x10, empty);
- } while ((empty & 0x100)==0);
+ } while ((empty & 0x100) == 0);
}
static __inline__ void waitQueue(void)
cyg_uint32 a;
a=state;
int repeat=0;
- if (state==TAP_RESET)
+ if (state == TAP_RESET)
{
// The FPGA nor we know the current state of the CPU TAP
// controller. This will move it to TAP for sure.
ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value);
#if 1
#if TEST_MANUAL()
- if ((state==TAP_DRSHIFT) && (endState != TAP_DRSHIFT))
+ if ((state == TAP_DRSHIFT) && (endState != TAP_DRSHIFT))
{
int i;
setCurrentState(state);
{
int tms;
tms=0;
- if ((i==repeat-1) && (state != endState))
+ if ((i == repeat-1) && (state != endState))
{
tms=1;
}
#endif
#else
/* maximum debug version */
- if ((repeat>0) && ((state==TAP_DRSHIFT)||(state==TAP_SI)))
+ if ((repeat>0) && ((state == TAP_DRSHIFT)||(state == TAP_SI)))
{
int i;
/* sample shift register for every bit. */
for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap=nextTap)
{
nextTap=jtag_tap_next_enabled(tap);
- if (nextTap==NULL)
+ if (nextTap == NULL)
{
pause_state = end_state;
}
enum tap_state end_state)
{
- int singletap=(jtag_tap_next_enabled(jtag_tap_next_enabled(NULL))==NULL);
- if ((singletap) && (num_fields==3))
+ int singletap=(jtag_tap_next_enabled(jtag_tap_next_enabled(NULL)) == NULL);
+ if ((singletap) && (num_fields == 3))
{
/* used by embeddedice_write_reg_inner() */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[1], value[1]);
shiftValueInner(TAP_DRSHIFT, end_state, num_bits[2], value[2]);
- } else if ((singletap) && (num_fields==2))
+ } else if ((singletap) && (num_fields == 2))
{
/* used by arm7 code */
shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, num_bits[0], value[0]);
static int zy1000_khz(int khz, int *jtag_speed)
{
- if (khz==0)
+ if (khz == 0)
{
*jtag_speed=0;
}
static int zy1000_speed_div(int speed, int *khz)
{
- if (speed==0)
+ if (speed == 0)
{
*khz = 0;
}
alive_sleep(1);
}
- if (i==1000)
+ if (i == 1000)
{
LOG_USER("SRST didn't deassert after %dms", i);
} else if (i>1)
tap_state_t pause_state;
int l;
k=num_bits-j;
- pause_state=(shiftState==TAP_DRSHIFT)?TAP_DRSHIFT:TAP_IRSHIFT;
+ pause_state=(shiftState == TAP_DRSHIFT)?TAP_DRSHIFT:TAP_IRSHIFT;
if (k>32)
{
k=32;
{
nextTap=jtag_tap_next_enabled(tap);
tap_state_t end_state;
- if (nextTap==NULL)
+ if (nextTap == NULL)
{
end_state = state;
} else
nextTap=jtag_tap_next_enabled(tap);
int found=0;
tap_state_t end_state;
- if (nextTap==NULL)
+ if (nextTap == NULL)
{
end_state = state;
} else
{
// static int const reg_addr=0x5;
tap_state_t end_state=jtag_get_end_state();
- if (jtag_tap_next_enabled(jtag_tap_next_enabled(NULL))==NULL)
+ if (jtag_tap_next_enabled(jtag_tap_next_enabled(NULL)) == NULL)
{
/* better performance via code duplication */
if (little)
fd_set read_fds;
gdb_connection_t *gdb_con = connection->priv;
int t;
- if (got_data==NULL)
+ if (got_data == NULL)
got_data=&t;
*got_data=0;
else if (type == 4) /* access watchpoint */
wp_type = WPT_ACCESS;
- if (gdb_breakpoint_override && ((bp_type==BKPT_SOFT)||(bp_type==BKPT_HARD)))
+ if (gdb_breakpoint_override && ((bp_type == BKPT_SOFT)||(bp_type == BKPT_HARD)))
{
bp_type=gdb_breakpoint_override_type;
}
b1=*((flash_bank_t **)a);
b2=*((flash_bank_t **)b);
- if (b1->base==b2->base)
+ if (b1->base == b2->base)
{
return 0;
} else if (b1->base>b2->base)
if (argc == 0)
{
- } else if (argc==1)
+ } else if (argc == 1)
{
gdb_breakpoint_override = 1;
- if (strcmp(args[0], "hard")==0)
+ if (strcmp(args[0], "hard") == 0)
{
gdb_breakpoint_override_type=BKPT_HARD;
- } else if (strcmp(args[0], "soft")==0)
+ } else if (strcmp(args[0], "soft") == 0)
{
gdb_breakpoint_override_type=BKPT_SOFT;
} else if (strcmp(args[0], "disable") == 0)
}
if (gdb_breakpoint_override)
{
- LOG_USER("force %s breakpoints", (gdb_breakpoint_override_type==BKPT_HARD)?"hard":"soft");
+ LOG_USER("force %s breakpoints", (gdb_breakpoint_override_type == BKPT_HARD)?"hard":"soft");
} else
{
LOG_USER("breakpoint type is not overriden");
arm11->target = target;
- if (target->tap==NULL)
+ if (target->tap == NULL)
return ERROR_FAIL;
if (target->tap->ir_length != 5)
return ERROR_FAIL;
}
- if (arm7_9->sw_breakpoints_added==1)
+ if (arm7_9->sw_breakpoints_added == 1)
{
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_VALUE], arm7_9->arm_bkpt);
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0x0);
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~EICE_W_CTRL_nOPC & 0xff);
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], EICE_W_CTRL_ENABLE);
}
- else if (arm7_9->sw_breakpoints_added==2)
+ else if (arm7_9->sw_breakpoints_added == 2)
{
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_VALUE], arm7_9->arm_bkpt);
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_DATA_MASK], 0x0);
uint32_t mask = (breakpoint->length == 4) ? 0x3u : 0x1u;
/* reassign a hw breakpoint */
- if (breakpoint->set==0)
+ if (breakpoint->set == 0)
{
arm7_9_assign_wp(arm7_9, breakpoint);
}
- if (breakpoint->set==1)
+ if (breakpoint->set == 1)
{
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_VALUE], breakpoint->address);
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], mask);
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], ~EICE_W_CTRL_nOPC & 0xff);
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], EICE_W_CTRL_ENABLE);
}
- else if (breakpoint->set==2)
+ else if (breakpoint->set == 2)
{
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_VALUE], breakpoint->address);
embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_ADDR_MASK], mask);
{
return retval;
}
- if (current_instr==arm7_9->arm_bkpt)
+ if (current_instr == arm7_9->arm_bkpt)
if ((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
{
return retval;
{
return retval;
}
- if (current_instr==arm7_9->thumb_bkpt)
+ if (current_instr == arm7_9->thumb_bkpt)
if ((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
{
return retval;
return ERROR_TARGET_NOT_HALTED;
}
- if (arm7_9->breakpoint_count==0)
+ if (arm7_9->breakpoint_count == 0)
{
/* make sure we don't have any dangling breakpoints. This is vital upon
* GDB connect/disconnect
arm7_9->wp_available++;
arm7_9->breakpoint_count--;
- if (arm7_9->breakpoint_count==0)
+ if (arm7_9->breakpoint_count == 0)
{
/* make sure we don't have any dangling breakpoints */
if ((retval = arm7_9_clear_watchpoints(arm7_9)) != ERROR_OK)
if (target->reset_halt)
{
enum reset_types jtag_reset_config = jtag_get_reset_config();
- if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
+ if ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0)
{
check_pc = 1;
}
armv4_5_invalidate_core_regs(target);
- if ((target->reset_halt) && ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0))
+ if ((target->reset_halt) && ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0))
{
/* debug entry was already prepared in arm7_9_assert_reset() */
target->debug_reason = DBG_REASON_DBGRQ;
*/
int arm7_9_halt(target_t *target)
{
- if (target->state==TARGET_RESET)
+ if (target->state == TARGET_RESET)
{
LOG_ERROR("BUG: arm7/9 does not support halt during reset. This is handled in arm7_9_assert_reset()");
return ERROR_OK;
buffer += thisrun_accesses * 4;
num_accesses += thisrun_accesses;
- if ((j++%1024)==0)
+ if ((j++%1024) == 0)
{
keep_alive();
}
buffer += thisrun_accesses * 2;
num_accesses += thisrun_accesses;
- if ((j++%1024)==0)
+ if ((j++%1024) == 0)
{
keep_alive();
}
buffer += thisrun_accesses * 1;
num_accesses += thisrun_accesses;
- if ((j++%1024)==0)
+ if ((j++%1024) == 0)
{
keep_alive();
}
if ((retval=target_wait_state(target, TARGET_DEBUG_RUNNING, 500)) != ERROR_OK)
return retval;
- int little=target->endianness==TARGET_LITTLE_ENDIAN;
+ int little=target->endianness == TARGET_LITTLE_ENDIAN;
int count=dcc_count;
uint8_t *buffer=dcc_buffer;
if (count>2)
retval = armv4_5_run_algorithm_inner(target, 0, NULL, 1, reg_params,
arm7_9->dcc_working_area->address, arm7_9->dcc_working_area->address+6*4, 20*1000, &armv4_5_info, arm7_9_dcc_completion);
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
uint32_t endaddress=buf_get_u32(reg_params[0].value, 0, 32);
if (endaddress != (address+count*4))
/* clock the target, and read the databus
* the *in pointer points to a buffer where elements of 'size' bytes
- * are stored in big (be==1) or little (be==0) endianness
+ * are stored in big (be == 1) or little (be == 0) endianness
*/
int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
{
/* get pointers to arch-specific information */
reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
reg_cache_t *t=embeddedice_build_reg_cache(target, arm7_9);
- if (t==NULL)
+ if (t == NULL)
return ERROR_FAIL;
(*cache_p) = t;
/* clock the target, and read the databus
* the *in pointer points to a buffer where elements of 'size' bytes
- * are stored in big (be==1) or little (be==0) endianness
+ * are stored in big (be == 1) or little (be == 0) endianness
*/
int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
{
reg_cache_t *t;
/* one extra register (vector catch) */
t=embeddedice_build_reg_cache(target, arm7_9);
- if (t==NULL)
+ if (t == NULL)
return ERROR_FAIL;
(*cache_p) = t;
arm7_9->eice_cache = (*cache_p);
{
adi_jtag_dp_scan_u32(swjdp, instr, reg_addr, RnW, outvalue, NULL, NULL);
- if ((RnW==DPAP_READ) && (invalue != NULL))
+ if ((RnW == DPAP_READ) && (invalue != NULL))
{
adi_jtag_dp_scan_u32(swjdp, DAP_IR_DPACC, DP_RDBUFF, DPAP_READ, 0, invalue, &swjdp->ack);
}
command_print(cmd_ctx, "\t\tComponent cid1 0x%" PRIx32 ", class is %s",c_cid1,class_description[(c_cid1 >> 4)&0xF]); /* Se ARM DDI 0314 C Table 2.2 */
command_print(cmd_ctx, "\t\tCID3 0x%" PRIx32 ", CID2 0x%" PRIx32 ", CID1 0x%" PRIx32 ", CID0, 0x%" PRIx32 "",c_cid3,c_cid2,c_cid1,c_cid0);
command_print(cmd_ctx, "\t\tPID3 0x%" PRIx32 ", PID2 0x%" PRIx32 ", PID1 0x%" PRIx32 ", PID0, 0x%" PRIx32 "",c_pid3,c_pid2,c_pid1,c_pid0);
- /* For CoreSight components, (c_cid1 >> 4)&0xF==9 , we also read 0xFC8 DevId and 0xFCC DevType */
+ /* For CoreSight components, (c_cid1 >> 4)&0xF == 9 , we also read 0xFC8 DevId and 0xFCC DevType */
}
else
{
}
else if ((op == 0xd) || (op == 0xf)) /* <opcode1>{<cond>}{S} <Rd>, <shifter_operand> */
{
- if (opcode==0xe1a00000) /* print MOV r0,r0 as NOP */
+ if (opcode == 0xe1a00000) /* print MOV r0,r0 as NOP */
snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tNOP",address, opcode);
else
snprintf(instruction->text, 128, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\t%s%s%s r%i, %s",
char *mnemonic = NULL;
/* sign extend 11-bit offset */
- if (((opc==0) || (opc==2)) && (offset & 0x00000400))
+ if (((opc == 0) || (opc == 2)) && (offset & 0x00000400))
offset = 0xfffff800 | offset;
target_address = address + 4 + (offset << 1);
break;
}
- if ((imm==0) && (opc != 0))
+ if ((imm == 0) && (opc != 0))
imm = 32;
instruction->info.data_proc.Rd = Rd;
mnemonic = "STR";
}
- if ((opcode&0xF000)==0x8000)
+ if ((opcode&0xF000) == 0x8000)
{
suffix = 'H';
shift = 1;
{
jtag_tap_t *tap;
tap = jtag_info->tap;
- if (tap==NULL)
+ if (tap == NULL)
return ERROR_FAIL;
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
- if (no_verify_capture==NULL)
+ if (no_verify_capture == NULL)
{
jtag_add_ir_scan(1, &field, jtag_get_end_state());
} else
while (breakpoint)
{
- if (breakpoint==breakpoint_remove)
+ if (breakpoint == breakpoint_remove)
break;
breakpoint_p = &breakpoint->next;
breakpoint = breakpoint->next;
}
- if (breakpoint==NULL)
+ if (breakpoint == NULL)
return;
target_remove_breakpoint(target, breakpoint);
watchpoint = watchpoint->next;
}
- if (watchpoint==NULL)
+ if (watchpoint == NULL)
return;
target_remove_watchpoint(target, watchpoint);
(*watchpoint_p) = watchpoint->next;
jtag_tap_t *tap;
tap = etb->tap;
- if (tap==NULL)
+ if (tap == NULL)
return ERROR_FAIL;
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
/* convert ELF header field to host endianness */
#define field16(elf,field)\
- ((elf->endianness==ELFDATA2LSB)? \
+ ((elf->endianness == ELFDATA2LSB)? \
le_to_h_u16((uint8_t*)&field):be_to_h_u16((uint8_t*)&field))
#define field32(elf,field)\
- ((elf->endianness==ELFDATA2LSB)? \
+ ((elf->endianness == ELFDATA2LSB)? \
le_to_h_u32((uint8_t*)&field):be_to_h_u32((uint8_t*)&field))
static int autodetect_image_type(image_t *image, char *url)
}
retval = fileio_read(&fileio, 9, buffer, &read_bytes);
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
if (read_bytes != 9)
{
return retval;
/* check header against known signatures */
- if (strncmp((char*)buffer,ELFMAG,SELFMAG)==0)
+ if (strncmp((char*)buffer,ELFMAG,SELFMAG) == 0)
{
LOG_DEBUG("ELF image detected.");
image->type = IMAGE_ELF;
}
elf->segment_count = field16(elf,elf->header->e_phnum);
- if (elf->segment_count==0)
+ if (elf->segment_count == 0)
{
LOG_ERROR("invalid ELF file, no program headers");
return ERROR_IMAGE_FORMAT_ERROR;
case 2:
return mips32_pracc_read_mem16(ejtag_info, addr, count, (uint16_t*)buf);
case 4:
- if (count==1)
+ if (count == 1)
return mips32_pracc_read_u32(ejtag_info, addr, (uint32_t*)buf);
else
return mips32_pracc_read_mem32(ejtag_info, addr, count, (uint32_t*)buf);
case 2:
return mips32_pracc_write_mem16(ejtag_info, addr, count,(uint16_t*)buf);
case 4:
- if (count==1)
+ if (count == 1)
return mips32_pracc_write_u32(ejtag_info, addr, (uint32_t*)buf);
else
return mips32_pracc_write_mem32(ejtag_info, addr, count, (uint32_t*)buf);
jtag_tap_t *tap;
tap = ejtag_info->tap;
- if (tap==NULL)
+ if (tap == NULL)
return ERROR_FAIL;
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr)
jtag_tap_t *tap;
tap = ejtag_info->tap;
- if (tap==NULL)
+ if (tap == NULL)
return ERROR_FAIL;
scan_field_t field;
uint8_t t[4], r[4];
int target_arch_state(struct target_s *target)
{
int retval;
- if (target==NULL)
+ if (target == NULL)
{
LOG_USER("No target has been configured");
return ERROR_OK;
return retval;
}
- else if (argc==1)
+ else if (argc == 1)
{
if (strcmp(args[0], "on") == 0)
{
return retvaltemp;
}
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
command_print(cmd_ctx, "downloaded %u byte in %s",
(unsigned int)image_size,
if ((retvaltemp = duration_stop_measure(&duration, &duration_text)) != ERROR_OK)
return retvaltemp;
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
command_print(cmd_ctx, "dumped %lld byte in %s",
fileio.size, duration_text);
retval=ERROR_FAIL;
goto done;
}
- if ((t%16384)==0)
+ if ((t%16384) == 0)
{
keep_alive();
}
return retvaltemp;
}
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
command_print(cmd_ctx, "verified %u bytes in %s",
(unsigned int)image_size,
{
uint32_t i;
FILE *f=fopen(filename, "w");
- if (f==NULL)
+ if (f == NULL)
return;
writeString(f, "gmon");
writeLong(f, 0x00000001); /* Version */
length=maxBuckets;
}
int *buckets=malloc(sizeof(int)*length);
- if (buckets==NULL)
+ if (buckets == NULL)
{
fclose(f);
return;
static const int maxSample=10000;
uint32_t *samples=malloc(sizeof(uint32_t)*maxSample);
- if (samples==NULL)
+ if (samples == NULL)
return ERROR_OK;
int numSamples=0;
retval = ERROR_OK;
fastload_num=image.num_sections;
fastload=(struct FastLoad *)malloc(sizeof(struct FastLoad)*image.num_sections);
- if (fastload==NULL)
+ if (fastload == NULL)
{
image_close(&image);
return ERROR_FAIL;
fastload[i].address=image.sections[i].base_address+offset;
fastload[i].data=malloc(length);
- if (fastload[i].data==NULL)
+ if (fastload[i].data == NULL)
{
free(buffer);
break;
}
duration_stop_measure(&duration, &duration_text);
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
command_print(cmd_ctx, "Loaded %u bytes in %s", (unsigned int)image_size, duration_text);
command_print(cmd_ctx, "NB!!! image has not been loaded to target, issue a subsequent 'fast_load' to do so.");
{
if (argc>0)
return ERROR_COMMAND_SYNTAX_ERROR;
- if (fastload==NULL)
+ if (fastload == NULL)
{
LOG_ERROR("No image in memory");
return ERROR_FAIL;
command_print(cmd_ctx, "Write to 0x%08x, length 0x%08x",
(unsigned int)(fastload[i].address),
(unsigned int)(fastload[i].length));
- if (retval==ERROR_OK)
+ if (retval == ERROR_OK)
{
retval = target_write_buffer(target, fastload[i].address, fastload[i].length, fastload[i].data);
}
int xscale_jtag_set_instr(jtag_tap_t *tap, uint32_t new_instr)
{
- if (tap==NULL)
+ if (tap == NULL)
return ERROR_FAIL;
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
int xscale_receive(target_t *target, uint32_t *buffer, int num_words)
{
- if (num_words==0)
+ if (num_words == 0)
return ERROR_INVALID_ARGUMENTS;
int retval=ERROR_OK;
words_scheduled--;
}
}
- if (words_scheduled==0)
+ if (words_scheduled == 0)
{
if (attempts++==1000)
{
Code Review / openocd.git / commitdiff